ARM Architecture

ARM stands for

• Advanced Rate Machines

• Advanced RISC Machines

• Artificial Running Machines

• Aviary Running Machines

The ARM processors don’t support Byte addressability.

• True

• False

The address space in ARM is ___________

• 2²⁴

• 2⁶⁴

• 2¹⁶

• 2³²

The banked registers are used for ______

• Switching between supervisor and interrupt mode

• Extended storing

• Same as other general purpose registers

• None of the mentioned

All instructions in ARM are conditionally executed.

• True

• False

The addressing mode where the Effective Address of the operand is the contents of Rn is ______

• Pre-indexed mode

• Pre-indexed with write back mode

• Post-indexed mode

• None of the mentioned

_________ instruction is used to get the 1’s complement of the operand.

• COMP

• BIC

• ~CMP

• MVN

Which of the two instructions sets the condition flag upon execution?

i) ADDS R0,R1,R2

ii) ADD R0,R1,R2

• i

• ii

• Both i and ii

• Insufficient data

The ability to shift or rotate in the same instruction along with other operation is performed with the help of _________

• Switching circuit

• Barrel shifter circuit

• Integrated Switching circuit

• Multiplexer circuit

The offset used in the conditional branching is __________ bit.

• 24

• 32

• 16

• 8