In which architecture are instructions and data stored in separate memory units?

• Harvard

• Von Neumann

In which architecture do instructions and data each have their own bus?

• Harvard

• Von Neumann

In which architecture does a single control unit follow a linear fetch, decode and execute cycle?

• Harvard

• Von Neumann

In which architecture can the reading and writing of data be done at the same time as an instruction is being fetched?

• Harvard

• Von Neumann

In which architecture are instructions and data stored in a single, shared memory unit?

• Harvard

• Von Neumann

Which architecture processes just one instruction at a time?

• Harvard

• Von Neumann

Which architecture is used by RISC processors?

• Harvard

• Von Neumann

Which architecture uses registers to provide fast access to instructions and data?

• Harvard

• Von Neumann

A feature of contemporary architectures where a processor carries out a single instruction on multiple data at the same time.

• SIMD

• MIMD

• MAR

• TCP

A feature of contemporary architectures where a processor carries out a multiple instructions on multiple data at the same time.

• SIMD

• MIMD

• MAR

• TCP