VLSI design flow

What is design flow?

• A set of procedure that allows designers to progress from a specification for a chip to the final chip implementation in an error-free way

• A set of procedure that allows designers to progress from a specification for a chip to the final chip implementation in an error way

Design level is partitioned into:

• Back-end

• Middle-end

• Front-end

Physical and structural level are partitioned into:

• Middle-end

• Back-end

• Front-end

What is Application Specific Integrated Circuit (ASIC)?

• is designed to fit a specific application

• a general purpose IC

• a very complex design

The VLSI design flow starts with:

• RTL synthesis

• Product specifications

• Library mapping

What is the purpose of function verification?

• for debugging

• prove the structural netlist perform the same function as the original behavior HDL

• to check the speed performance

What is the purpose of Static Timing Analysis?

• to validate timing performance of the design

• to create test-bench of the design

What is floorplan?

• to plan for the chip power consumption

• to set the appropriate value to give margins for routability

What is routing?

• to place the standard cell

• for interconnecting the components on the chip

What is parasitic extraction?

• to measure resistance, capacitance and inductance of the design

• to analyze the area performance of the design