CISC VS RISC

Several CISC instructions may be equivalent to a single RISC instruction

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• FALSE

CISC aims to use as few lines of assembly code as possible, even if more clock cycles are needed as a result.

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• FALSE

RISC aims to improve processing speed by simplifying instructions so that one line takes one clock cycle.

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• FALSE

RISC code may have fewer lines of code, but will take more processor time.

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• FALSE

CISC code may have fewer lines of code, but will take more processor time.

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• FALSE

RISC code may have more lines of code than the CISC equivalent

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• FALSE

CISC processors...

• Are physically larger

• Are better at complex tasks

• Use more electricity than RISC

• Expect more work from the compiler to generate more code

• Not as good at pipelining

An example of where you would find CISC processors:

• Tablets

• Smartphones

• Laptops

• Desktop Computers

• Smartwatches

An example of where you would find RISC processors:

• Tablets

• Smartphones

• Laptops

• Desktop Computers

• Smartwatches

RISC Processors...

• Minimise the number of clock cycles per instruction

• Have a larger instruction set

• Tend to run at a lower clock speed

• Make use of pipelining

• Use less power and generate less heat