DIGITAL IC DESIGN

DIGITAL IC DESIGN

University

10 Qs

quiz-placeholder

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DIGITAL IC DESIGN

DIGITAL IC DESIGN

Assessment

Quiz

Other

University

Hard

Created by

Rahul NA

Used 3+ times

FREE Resource

10 questions

Show all answers

1.

MULTIPLE CHOICE QUESTION

2 mins • 1 pt

Media Image

VTC Characteristic curve of a CMOS inverter is shown in figure, find the region of operation of NMOS and PMOS at point A

NMOS -LINEAR

PMOS-OFF

NMOS -LINEAR

PMOS-SAT

NMOS -SAT

PMOS-LINEAR

NMOS -OFF

PMOS-LINEAR

2.

MULTIPLE CHOICE QUESTION

2 mins • 1 pt

Media Image

For VTC of the inverter shown in figure which of the following is false?

NMH=VDD-VIH

NML=VDD+VIL

3.

MULTIPLE CHOICE QUESTION

2 mins • 1 pt

Which of the following you will consider important while designing an efficient IC.

Low Power device

High Speed Device

Low Energy-Delay Product devices

High Energy-Delay Product devices

4.

MULTIPLE CHOICE QUESTION

2 mins • 1 pt

Media Image

Find the output Y when A=B=C=VDD and the threshold drop is Vtn

Y=VDD

Y=VDD-VTN

Y=VDD-2VTN

5.

MULTIPLE SELECT QUESTION

2 mins • 1 pt

Which of the following are the Issues in dynamic IC design?

(multiple answers are right)

Charge Sharing

Charge Leakage

Capacitive Coupling

Clock Feedthrougn

6.

MULTIPLE CHOICE QUESTION

2 mins • 1 pt

What is the most important disadvantage of Domino Logic

Non-Inverting output

Use of an extra Inverter

Cannot handle large fan in logic.

No Pull up logic circuit like static CMOS inverter.

7.

MULTIPLE CHOICE QUESTION

2 mins • 1 pt

Media Image

What type of design technique is shown in the figure?

Domino Logic

n-P CMOS

Ratioed Logic

Sequential Circuits

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