Computer Architecture

Computer Architecture

9th Grade

10 Qs

quiz-placeholder

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Computer Architecture

Computer Architecture

Assessment

Quiz

Computers

9th Grade

Hard

Created by

Zhewei Zhang

Used 33+ times

FREE Resource

10 questions

Show all answers

1.

MULTIPLE SELECT QUESTION

2 mins • 1 pt

Select the correct statements.

CPU processes instructions and data that are input into the computer so that the result can be output.

Microprocessor is a type of integrated circuit on a single chip.

Washing machine is an example of embedded system

Personal computers use microprocessors to process the main calculation.

2.

MATCH QUESTION

2 mins • 1 pt

Match the following registers

it stores data temporarily during the ALU calculations

PC

stores data which has just been read from memory or data which is about to be written to memory

MDR

this register stores the address of the memory location currently being read from or written to

MAR

this register stores the address where the next instruction to be read can be found

ACC

this register stores the current instruction being decoded and executed

CIR

3.

FILL IN THE BLANK QUESTION

2 mins • 1 pt

Give the name of the following term. Lower case.

A component in CPU that stores temporary data. It is small in size and fast in speed.

4.

LABELLING QUESTION

2 mins • 1 pt

Please finish the diagram on how instructions are fetched.

j
i
h
g
f
e
d
c
b
a
CPU
Data bus
MDR
Address bus
CU
CIR
MAR
obtuse angle
PC
RAM

5.

MULTIPLE SELECT QUESTION

2 mins • 1 pt

Which of the following statements are correct?

Instruction set is a set of all the commands that are understood and can be processed by the CPU

Control unit use data bus to control other components in CPU.

ALU is used to decode the instruction.

Instructions to be fetch is stored in RAM

6.

MULTIPLE SELECT QUESTION

2 mins • 1 pt

Select the factors that will affect CPU's performance

number of cores

size of the cache

speed of the clock

7.

REORDER QUESTION

2 mins • 1 pt

Reorder the following register where address or instruction moves through during fetch stage.

PC

MAR

RAM

MDR

CIR

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