Flip flops

In an RS flip-flop, what is the condition when both the S (Set) and R (Reset) inputs are HIGH?

• Undefined state

• Set state

• Reset state

• Hold state

In an RS Flip flop, when is the flip flop said to be set?

• R = 1, S = 0

• R = 0, S = 1

• R = 0, S = 0

• R = 1, S = 1

What is the primary purpose of a D flip-flop?

• To perform arithmetic operations

• To store Data

• To generate clock signals

• To count pulses

In a D flip-flop, if the D input is LOW and the clock signal transitions from LOW to HIGH, what will be the state of the flip-flop after the clock edge?

• Q will be LOW

• Q will be HIGH

• It depends on the previous state

• Q will toggle

What is the primary advantage of a JK flip-flop over an RS flip-flop?

• Simplicity

• Lower power consumption

• Edge-triggered operation

• Elimination of the undefined state

In a JK flip-flop, if both J and K inputs are HIGH, what will be the effect on the Q output?

• Q will be LOW

• Q will be HIGH

• No change in Q

• Q will toggle

What is the primary purpose of a T flip-flop?

• To store data

• To generate clock signals

• To divide the input frequency by 2

• To toggle its output

Which flip-flop type is commonly used for frequency division in digital circuits?

• RS flip-flop

• D flip-flop

• T flip-flop

• JK flip-flop

In a D flip-flop, what is the relationship between the D and Q outputs in a positive-edge-triggered operation?

• Q = D

• Q = NOT D

• Q = D OR Q

• Q = D AND Q

In a master-slave JK flip-flop, when does the master latch the inputs?

• On the rising edge of the clock

• On the falling edge of the clock

• When the clock is LOW

• When the clock is HIGH