Computer Architecture Quiz

What is the primary goal of Instruction-Level Parallelism (ILP)?

• Increase CPU clock speed

• Execute multiple instructions concurrently

• Reduce memory access time

• Simplify program execution

According to Amdahl's Law, what limits the maximum speedup of a program?

• The number of processors available

• The proportion of the code that must be executed sequentially

• The type of processor used

• The size of the input data

Which of the following is NOT a stage in a basic CPU pipeline?

• Fetch

• Decode

• Commit

• Optimize

Which of the following is NOT a type of hazard in pipelining?

• Data hazard

• Control hazard

• Execution hazard

• Structural hazard

What is a key feature of superscalar execution?

• Executes a single instruction at a time

• Executes multiple instructions simultaneously

• Focuses only on branch prediction

• Avoids out-of-order execution

How does Out-of-Order (OoO) execution improve performance?

• It increases clock speed

• It executes instructions as soon as their dependencies are resolved, not necessarily in the original program order

• It allows parallel execution of all instructions

• It reduces the size of the instruction pipeline

Why is register renaming used in modern processors?

• To reduce memory access latency

• To avoid false dependencies like Write-After-Write (WAW) and Write-After-Read (WAR)

• To increase cache efficiency

• To optimize energy consumption

Branch prediction is primarily used to minimize which type of hazard?

• Data hazards

• Structural hazards

• Control hazards

• Execution hazards

What is a primary limitation of Instruction-Level Parallelism (ILP)?

• High energy consumption

• Limited availability of compilers

• The inherent sequential portions of a program

• Hardware complexity

What technique helps eliminate pipeline stalls caused by data hazards?

• Branch prediction

• Speculative execution

• Forwarding (Data Bypassing)

• Superscalar execution