FlipFlop, Register

A latch is a:

• Monostable state device

• Bistable state device

• None of the above

In an SR Active High latch, if S = 1 and R = 0, the output will be:

• Q = 0, Q̅ = 1

• Q = 1, Q̅ = 0

• Q = 1, Q̅ = 1

• Q = 0, Q̅ = 0

What are the inputs that will cause the invalid state of an SR latch using NOR gates?

• S = 1, R = 0

• S = 0, R = 1

• S = 1, R = 1

• S = 0, R = 0

Select the following types of Flip flop :

(Answer can be more than 1)

• JK Flip flop

• DE Flip flop

• SR Flip flop

• TU Flip flop

The main difference between a latch and a flip-flop is :

(answer can be more than 1)

• Latch is bistable device, while Flip flop in Monostable device

• Flip Flop requires clock

• Latch requires clock

• Output of Flip flop changes depends on triggering clock

Advantages of D Flip flop :

(answer can be more than 1)

• Simple Design With only one input , it’s easier to implement and less prone to input errors.

• D Flip-Flops are commonly used to store bits in registers, shift registers, and counters.

• Complex Design will cause the design has more gates

• Multiple D Flip-Flops can be easily connected in series like shift registers.

1 bit enter into register per clock pulse, and shifted out 1 bit per clock pulse.

The following operation above, desribe a ________

• Serial in Serial Out (SISO)

• Serial in Parallel Out (SIPO)

• Parallel in Serial Out (PISO)

• Parallel in Parallel Out (PIPO)

The following Shift Register is :

• SISO

• SIPO

• PISO

• PIPO

The figure below shows the circuit of ________ where it is one of Shift Register application. Name the following :

• Johnson Counter

• Johnny Counter

• Ring Counter

• Pyramid Counter

Description :

It’s basically a shift register where the output of the last flip-flop is connected back to the input of the first.

Uses D-type flip-flops (typically)

• Only one flip-flop is HIGH (1) at any time; all others are LOW (0).

Based on description above, choose the right counter

• Johnson Counter

• Ring counter