
ECE212_INV3
Authored by Sameh Ibrahim
Science
University
Used 13+ times

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5 questions
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1.
MULTIPLE SELECT QUESTION
45 sec • 1 pt
As Wp increases which statement(s) is(are) true?
tpLH increases
tpLH decreases
tpHL increases
tpHL decreases
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
The minimum delay of a CMOS inverter is when beta is equal to
r
sqrt(r)
r squared
2r
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Usually, the highest power consumption component of a CMOS inverter is
dynamic
static
short circuit
4.
MULTIPLE SELECT QUESTION
45 sec • 1 pt
Dynamic power consumption can be reduced by:
increasing the supply voltage
decreasing the supply voltage
increasing the frequency
decreasing the frequency
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Increasing the supply voltage to the CMOS inverter
always increases its delay
always decreases its delay
always decreases its power consumption
always increases its energy delay product
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