CBSE Class 10 Computer Science Computer Network Quiz

CBSE Class 10 Computer Science Computer Network Quiz

KG

45 Qs

quiz-placeholder

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CBSE Class 10 Computer Science Computer Network Quiz

CBSE Class 10 Computer Science Computer Network Quiz

Assessment

Quiz

Others

KG

Practice Problem

Hard

Created by

Preethi Thiru

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45 questions

Show all answers

1.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which of the following statement is incorrect?

Multiplexers are designed to accept data from several I/O devices and transmit a unified stream of data on one communication line

HDLC is a standard synchronous communication protocol

RTS/CTS is the way the terminal indicates ringing

RTS/CTS is the way the DTE indicates that it is ready to transmit data and the way the DCE indicates that it is ready to accept data

2.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Terminals are required for?

real-time, time sharing & message switching

real time, distributed processing & manager inquiry

real time, time-sharing & distributed message processing

real-time, batch processing & time-sharing

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which data communication method is used to transmit the data over a serial communication link?

simplex

half-duplex

band

full-duplex

4.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What is the minimum number of wires needed to send data over a serial communication link layer?

1

4

2

6

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which of the following types of channels moves data relatively slowly?

narrow band channel

voice band channel

wide band channel

fiber optic channel

6.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Most data communications involving telegraph lines use?

narrowband channel

wideband channel

dialed service

simplex lines

7.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

The synchronous modems are more costly than the asynchronous modems because?

they operate with a larger bandwidth

they transmit the data with stop and start bits

they produce large volume of data

they contain clock recovery circuits

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