Quiz on Flip-Flops and Registers

In an SR flip-flop, when both S and R inputs are HIGH, the output is:

• Set

• Reset

• Toggle

• Invalid state

Which of the following is true for an SR flip-flop?

• It has no clock input

• It stores 2 bits

• It has an indeterminate state when S = R = 1

• It is edge-triggered only

The main advantage of the JK flip-flop over the SR flip-flop is:

• Higher speed

• No invalid state

• Lower cost

• Requires fewer inputs

In a JK flip-flop, when both J and K are HIGH, the output will:

• Remain the same

• Toggle

• Reset

• Set

The D in D flip-flop stands for:

• Direct

• Data

• Delay

• Digital

The characteristic equation of a D flip-flop is:

• Q(next) = JQ′ + K′Q

• Q(next) = D

• Q(next) = S + R′

• Q(next) = Q

An edge-triggered flip-flop changes its state:

• Whenever the clock is HIGH

• Only at the rising or falling edge of the clock

• When both inputs are HIGH

• Continuously with the clock

In a positive edge-triggered flip-flop, the output changes:

• At the high-to-low transition of the clock

• At the low-to-high transition of the clock

• When the clock is LOW

• When the clock is HIGH

Which of the following is not an application of flip-flops?

• Data storage

• Frequency division

• Debouncing switches

• Voltage regulation

Flip-flops can be used to construct:

• Counters

• Shift registers

• Memory units

• All of the above