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WorksheetsCOA Quiz FH2020
Total questions: 18
Worksheet time: 17mins
Full Name:
Your SE Division:
3
4
Roll Number: (Only 2 digit Roll number)
In computers, subtraction is carried out generally by
1's Complement Method
Signed Magnitude Method
2's Complement Method
BCD Subtraction Method
Which algorithm includes repeated addition of two predetermined values A and S to a product P and then performs a rightward arithmetic shift on P:
Booth's Algorithm
Usual Algorithm
Multiplication Algorithm
None of these
How many main approaches to algorithm for division:
2
3
4
5
Which kind of architecture is used in EDVAC ?
Harvard
Von Neumann
Both of these
None of these
In register addressing mode operands are looked atIn cache
In secondary storage
In CPU
In Primary memory
Each stage in pipelining should be completed within ___cycle.
1
3
2
4
What is the control units function in the CPU?
To perform logic operations
Decode program instruction
To transfer data to primary storage
To store program instruction
A microprogram sequencer
Generates the address of next micro instruction to be executed.
Generates the control signals to execute a microinsruction.
Sequentially averages all microinstuctions in the control memory.
Enables the efficient handling of a microprogram subroutine.
____________ are the different type/s of generator of control signals.
Micro-programmed
Hardwired
Micro-instruction
Both micro-programmed and hardwired
An address in main memory is called
Logical Address
Physical Address
Memory Address
Word Address
If the main memory is of 8KB and the cache memory is of 2K words. It uses associative mapping. Then each word of cache shall be
11
16
20
21
Virtual memory of a computer system may be
of unlimited size
as big as maximum addressing capability of the computer system.
of size equivalent to total capacity of secondary storage plus size of RAM
All of the above
There are __________ different techniques of data transfer.
2
3
4
5
A DMA transfer replies
Direct transfer of data between memory and accumulator
Direct transfer of data between memory and input output devices without the use of processor.
Transfer of data exclusively within microprocessor registers
A fast transfer of data between processor and I/O devices.
Which of the following architecture supports out of order execution?
RISC
CISC
Superscalar
All of the above
