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WorksheetsComputer Architecture -chapter 1
Total questions: 30
Worksheet time: 26mins
1. The ______ format is usually used to store data.
a) BCD
b) Decimal
c) Hexadecimal
d) Octal
A source program is usually in _______
a) Assembly language
b) Machine level language
c) High-level language
d) Natural language
The small extremely fast, RAM’s are called as _______
a) Cache
b) Heaps
c) Accumulators
d) Stacks
The ALU makes use of _______ to store the intermediate results.
a) Accumulators
b) Registers
c) Heap
d) Stack
(a) bus structure is usually used to connect I/O devices
The control unit controls other units by generating ___________
a) Control signals
b) Timing signals
c) Transfer signals
d) Command Signals
To reduce the memory access time we generally make use of ______
a) Heaps
b) Higher capacity RAM’s
c) SDRAM’s
d) Cache’s
______ is generally used to increase the apparent size of physical memory.
a) Secondary memory
b) Virtual memory
c) Hard-disk
d) Disks
The time delay between two successive initiations of memory operation _______
a) Memory access time
b) Memory search time
c) Memory cycle time
d) Instruction delay
______ are used to overcome the difference in data transfer speeds of various devices.
a) Speed enhancing circuitry
b) Bridge circuits
c) Multiple Buses
d) Buffer registers
ANSI stands for (a)
The decoded instruction is stored in ______
a) IR
b) PC
c) Registers
d) MDR
The instruction -> Add LOCA, R0 does _______
a) Adds the value of LOCA to R0 and stores in the temp register
b) Adds the value of R0 to the address of LOCA
c) Adds the values of both LOCA and R0 and stores it in R0
d) Adds the value of LOCA with a value in accumulator and stores it in R0
Which registers can interact with the secondary storage?
a) MAR
b) PC
c) IR
d) R0
During the execution of a program which gets initialized first?
a) MDR
b) IR
c) PC
d) MAR
Which of the register/s of the processor is/are connected to Memory Bus?
a) PC
b) MAR
c) IR
d) Both PC and MAR
ISP stands for (a)
The internal components of the processor are connected by _______
a) Processor intra-connectivity circuitry
b) Processor bus
c) Memory bus
d) Rambus
During the execution of the instructions, a copy of the instructions is placed in the ______
a) Register
b) RAM
c) System heap
d) Cache
Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?
a) A
b) B
c) Both take the same time
d) Insufficient information
A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______
a) Super-scaling
b) Pipe-lining
c) Parallel Computation
d) None of the mentioned
The clock rate of the processor can be improved by _________
a) Improving the IC technology of the logic circuits
b) Reducing the amount of processing done in one step
c) By using the overclocking method
d) All of the mentioned
An optimizing Compiler does _________
a) Better compilation of the given piece of code
b) Takes advantage of the type of processor and reduces its process time
c) Does better memory management
d) None of the mentioned
The ultimate goal of a compiler is to ________
a) Reduce the clock cycles for a programming task
b) Reduce the size of the object code
c)Be versatile
d) Be able to detect even the smallest of errors
SPEC stands for _______
a) Standard Performance Evaluation Code
b) System Processing Enhancing Code
c) System Performance Evaluation Corporation
d) Standard Processing Enhancement Corporation
When Performing a looping operation, the instruction gets stored in the ______
a) Registers
b) Cache
c) System Heap
d) System stack
If a processor clock is rated as 1250 million cycles per second, then its clock period is ________
a) 1.9 * 10-10 sec
b) 1.6 * 10-9 sec
c) 1.25 * 10-10 sec
d) 8 * 10-10 sec
If the instruction, Add R1, R2, R3 is executed in a system that is pipe-lined, then the value of S is (Where S is a term of the Basic performance equation)?
a) 3
b) ~2
c) ~1
d) 6
CISC stands for _______
a) Complete Instruction Sequential Compilation
b) Computer Integrated Sequential Compiler
c) Complex Instruction Set Computer
d) Complex Instruction Sequential Compilation
During the transfer of data between the processor and memory we use ______
a) Cache
b) TLB
c) Buffers
d) Registers
