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COA Unit-1

Total questions: 20

Worksheet time: 20mins

Name
Class
Date
1.

1. RTL stands for:

a)

Random transfer language

b)

Register transfer language

c)

Arithmetic transfer language

d)

All of these

2.

1. Which operations are used for addition, subtraction, increment, decrement and complement function:

a)

Bus

b)

Memory transfer

c)

Arithmetic operation

d)

All of these

3.

In which transfer the computer register are indicated in capital letters for depicting its function:

a)

Memory transfer

b)

Register Transfer

c)

Bus transfer

d)

None of these

4.

Which operation is binary type, and are performed on bits string that is placed in register:

a)

Logical micro operation

b)

Arithmetic micro operation

c)

Both

d)

None

5.

In every transfer, selection of register by bus is decided by:

a)

Control signal

b)

No signal

c)

All signal

d)

All of above

6.

is a command given to a computer to perform a specified operation on some given data:

a)

An instruction

b)

Command

c)

Code

d)

None of these

7.

Abbreviation ASCII stands for

a)

American standard code for information interchange

b)

Abbreviation standard code for information interchange

c)

Both

d)

None of these

8.

what is the BCD for a decimal number 559:

a)

[010101011001]

b)

[0101 0001 1010]

c)

[0101 1001 1001]

d)

[1001 1010 0101]

9.

The difference between half adder and full adder is

a)

Half adder has two inputs while full adder has three outputs

b)

Half adder has two inputs while full adder has two inputs

c)

Half adder has two inputs while full adder has two outputs

d)

Half adder has three inputs while full adder has three outputs

10.

In which operation carry is obtained?

a)

Addition

b)

Multiplication

c)

Both addition and substraction

d)

Multiplication

11.

If A and B are the inputs of a half adder, the carry is given by

a)

A EXOR B

b)

A AND B

c)

A OR B

d)

A XOR B

12.

How many ANd,OR,EXOR gates are required for the configuration of full adder

a)

4,0,1

b)

2,1,2

c)

3,1,2

d)

1,1,2

13.

If A, B and C are the inputs of a full adder then the sum is given by

a)

A AND B AND C

b)

A OR B AND C

c)

A XOR B XOR C

d)

A OR B OR C

14.

In parts of the processor, adders are used to calculate

a)

Table Indices

b)

Increment and Decrement Operators

c)

Addresses

d)

All of the Above

15.

The Opeartion executed on data stored in registers is called

a)

Macro-operation

b)

Micro-Operation

c)

Bit-Operaton

d)

Byte-Operation

16.

The main virtue for using single Bus structure is

a)

Fast data transfers

b)

Cost effective connectivity and speed

c)

Cost effective connectivity and ease of attaching peripheral devices

d)

None of the mentioned

17.

What is a multiplexer?

a)

It is a type of decoder which decodes several inputs and gives one output

b)

A multiplexer is a device which converts many signals into one

c)

It takes one input and results into many output

d)

It is a type of encoder which decodes several inputs and gives one output

18.

In a multiplexer, the selection of a particular input line is controlled by ___________

a)

Data controller

b)

Selected lines

c)

Logic gates

d)

Both data controller and selected lines

19.

If the number of n selected input lines is equal to 2^m then it requires _____ select lines.

a)

2

b)

m

c)

n

d)

2n

20.

How many select lines would be required for an 8-line-to-1-line multiplexer?

a)

2

b)

4

c)

8

d)

3