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Total questions: 10
Worksheet time: 5mins
How many flip-flops are required to design MOD-32 counter?
6
3
45
5
The terminal count of a modulus-11 binary counter is ________.
1010
1000
1001
1100
Synchronous counters eliminate the delay problems encountered with asynchronous counters because the:
input clock pulses are applied only to the first and last stages
input clock pulses are applied only to the last stage
input clock pulses are not used to activate any of the counter stages
input clock pulses are applied simultaneously to each stage
What is the difference between combinational logic and sequential logic?
Combinational circuits are not triggered by timing pulses, sequential circuits are triggered by timing pulses
Combinational and sequential circuits are both triggered by timing pulses
Neither circuit is triggered by timing pulses.
Which segments of a seven-segment display would be required to be active to display the decimal digit 2?
a, b, d, e, and g
a, b, c, d, and g
a, b, c, d, and g
a, b, c, d, e, and f
The terminal count of a typical modulus-10 binary counter is ________
0000
1010
1001
1111
Which of the following is an invalid output state for an 8421 BCD counter?
1110
0000
0001
0010
How many different states does a 3-bit asynchronous counter have?
2
4
8
16
An asynchronous 4-bit binary down counter changes from count 2 to count 3. How many transitional states are required?
One
Two
Fifteen
none
The terminal count of a 3-bit binary counter in the DOWN mode is ________.
000
111
101
010
