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WorksheetsMODEL III _ EC8552 _ CAO _ PART A _30.11.2020
Total questions: 30
Worksheet time: 30mins
Name
Class
Date
1.
Where the result of an arithmetic and logical operation are stored ?
a)
In Accumulator
b)
In Cache Memory
c)
In ROM
d)
In Instruction Registry
2.
Why we need to have secondary storage ?
a)
Store large volume of data that exceed the capacity of main memory
b)
Perform arithmatic and logical operations
c)
To give power to the system too
d)
To help processor in processing
3.
___________ is the actual time the CPU spends computing for a specific task.
a)
CPU execution time
b)
Elapsed time
c)
User CPU time
d)
System CPU time
4.
The data transfer instruction that copies data from memory to a register is traditionally called
a)
Load
b)
Store
c)
Copy
d)
None of the above
5.
The binary representation used for communication within a computer system is termed as Machine Language
a)
Machine Langugage
b)
User Language
c)
Assemble Language
d)
None of the above
6.
In direct addressing mode, effective address of the operand is given in the address field of the instruction.
a)
Pseudo direct Addressing:
b)
Immediate Addressing
c)
Direct Addressing
d)
Register Addressing
7.
In which operation carry is obtained?
a)
a) Subtraction
b)
b) Addition
c)
c) Multiplication
d)
d) Both addition and subtraction
8.
When two equal singed-magnitude numbers are subtracted, the result should be?
a)
(A) +0
b)
(B) -0
c)
(C) 0
d)
(D) Can't find exact answer
9.
In multiplication algorithm, after the initialization the ____________ bit of the multiplier in Qn is tested.
a)
(A) high-order bit
b)
(B) sign bit
c)
(C) low-order bit
d)
(D) both A & B
10.
Which shift is used in multiplication algorithm?
a)
(A) shl
b)
(B) shr
c)
(C) cir
d)
(D) cil
11.
Booth algorithm gives a procedure for multiplying binary integers in _____________ representation.
a)
(A) signed-2's complement
b)
(B) signed-magnitude
c)
(C) signed-1's complement
d)
(D) sign-complement
12.
________ constitute the representation of the floating number.
a)
Sign
b)
Significant digits
c)
Scale factor
d)
All of the mentioned
13.
An implementation technique whereby multiple instructions are overlapped in execution, refers to
a)
Frame differencing
b)
Frame gate
c)
Pipelining
d)
Relocation
14.
When all instructions take the same number of cycles, which must also equal the number of pipeline stages the process is known as
a)
Pipe stage
b)
Stalling the pipeline
c)
Depth of the pipeline
d)
Stalling
15.
Pipelining increases the CPU instruction
a)
Size
b)
Through put
c)
Cycle rate
d)
Time
16.
Control hazards can cause a greater performance loss for MIPS pipeline than do<br />Control hazards can cause a greater performance loss for MIPS pipeline than do
a)
Stall
b)
Data hazard
c)
Structural hazard
d)
Branch hazard
17.
Every MIPS instruction can be implemented in at most
a)
2 clock cycles
b)
3 clock cycles
c)
4 clock cycles
d)
5 clock cycles
18.
Situations that prevent the next instruction in the instruction stream, from executing during its designated clock cycle are known as
a)
Pipe stage
b)
Previous stage
c)
Hazards
d)
Processor cycle
19.
The number of external connections required in 16 X 8 memory organisation is _____.
a)
14
b)
19
c)
15
d)
12
20.
In a 4M-bit chip organisation has a total of 19 external connections.then it has _______ address if 8 data lines are there.
a)
8
b)
9
c)
10
d)
11
21.
The reason for the implementation of the cache memory is
a)
To increase the internal memory of the system
b)
The difference in speeds of operation of the processor and memory
c)
To reduce the memory access and cycle time
d)
All of the above
22.
The correspondence between the main memory blocks and those in the cache is given by _________.
a)
Hash function
b)
Mapping function
c)
Locale function
d)
Assign function
23.
<br />In a virtual memory system the address space specified by the address lines of the CPU must be -----------than the physical memory size and -----------than the secondary storage size.<br />In a virtual memory system the address space specified by the address lines of the CPU must be -----------than the physical memory size and -----------than the secondary storage size.
a)
smaller, smaller
b)
smaller, larger
c)
larger, smaller
d)
larger, larger
24.
The transfer of large chunks of data with the involvement of the processor is done by _______ .
a)
DMA controller
b)
Arbitrator
c)
User system programs
d)
None of the above
25.
What is true about thread?
a)
A. Thread switching does not need to interact with operating system.
b)
B. All threads can share same set of open files, child processes.
c)
C. Multiple threaded processes use fewer resources.
d)
D. All of the above
26.
Multithreading models are _________ types?
a)
2
b)
3
c)
4
d)
5
27.
How many buses/cables are required to establish multiport memory organization between 7 CPUs & 5 MMs?
a)
40
b)
41
c)
42
d)
43
28.
Hypercube multiprocessor system is _____________.
a)
(A) tightly coupled system
b)
(B) loosely coupled system
c)
(C) mutually coupled system
d)
(D) both A & B can be possible, depends on application
29.
Which algorithm gives the highest priority to the requesting device that has not used the bus for the longest interval?
a)
(A) FIFO
b)
(B) Rotating daisy-chain
c)
(C) LRU
d)
(D) Polling
30.
Multiprocessors are classified as ________.
a)
(A) SIMD
b)
(B) MIMD
c)
(C) SISD
d)
(D) MISD
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