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Worksheets

DPSD QUIZ1

Total questions: 8

Worksheet time: 5mins

Name
Class
Date
1.

In an SR latch made by cross-coupling two NAND gates, if both S and R inputs are set to 0, then it will result in

a)

Q = 0, Q' = 1

b)

Q = 1, Q' = 0

c)

Q = 1, Q' = 1

d)

Indeterminate state

2.

Ripple counters are also called ____________

a)

SSI counters

b)

Asynchronous counters

c)

VLSI counters

d)

Synchronous counters

3.

What is the maximum possible range of bit-count specifically in n-bit binary counter consisting of ‘n’ number of flip-flops?

a)

0 to 2n + 1

b)

0 to 2n – 1

c)

0 to 2n + 1

d)

0 to 2n+1/2

4.

The difference between a flip-flop & latch is ____________

a)

Flip-flop consist of an extra output

b)

Both are same

c)

Latch has two inputs but flip-flop has one

d)

Latches has one input but flip-flop has two

5.

How is a J-K flip-flop made to be in toggle state?

a)

J = 0, K = 0

b)

J = 1, K = 0

c)

J = 0, K = 1

d)

J = 1, K = 1

6.

The main difference between a register and a counter is ___________

a)

A register has no specific sequence of states

b)

A counter has no specific sequence of states

c)

A register has capability to store one bit of information but counter has n-bit

d)

A register counts data

7.

Can a flipflop respond to its control and clock inputs while PRE\overline{PRE} =1 or CLEAR\overline{CLEAR} =1?

(a)  

8.

Master slave configuration is used in flipflop to

a)

Increase its Clocking rate

b)

Reduce Power Dissipation

c)

Eliminate Race around Condition

d)

Improve its realibility