wayground logo

Free Printable Worksheets

NEW

Font size

S
M
L
XL
Worksheets

FPGA & Digital Electronics

Total questions: 35

Worksheet time: 18mins

Name
Class
Date
1.

FPGA

stands for __________

a)

Full

Programmable Gate Array

b)

Full

Programmable Genuine Array

c)

First

Programmable Gate Array

d)

Field

Programmable Gate Array

2.

Which of

the following is/are the basic element/s of FPGA?

a)

Configuration

Logic Block (CLB)

b)

Interconnections

c)

I/O

Block

d)

all of

the above

3.

Which of

the following is a reprogrammable gate array?

a)

EPROM

b)

FPGA

c)

Both a & b

d)

ROM

4.

How

FPGA differs from PLD?

a)

FPGA is

slower than PLD

b)

FPGA

has high power dissipation

c)

FPGA

incorporates logic blocks

d)

None of

the above

5.

CPLD stands for

a)

complex programmable logic devices

b)

circuit programmable logic devices

c)

cell programmable logic devices

d)

none of these

6.

The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called

a)

Combinational circuits

b)

Sequential circuits

c)

Latches

d)

Flip-flops

7.

Whose operations are more faster among the following?

a)

Combinational circuits

b)

Sequential circuits

c)

Latches

d)

Flip-flops

8.

How many types of sequential circuits are?

a)

2

b)

3

c)

4

d)

5

9.

The basic latch consists of ___________

a)

Two inverters

b)

Two comparators

c)

Two amplifiers

d)

Two adders

10.

What is a trigger pulse?

a)

A pulse that starts a cycle of operation

b)

A pulse that reverses the cycle of operation

c)

A pulse that prevents a cycle of operation

d)

A pulse that enhances a cycle of operation

11.

The difference between a flip-flop & latch is ____________

a)

Both are same

b)

Flip-flop consist of an extra output

c)

Latches has one input but flip-flop has two

d)

Latch has two inputs but flip-flop has one

12.

Which sequential circuits generate the feedback path due to the cross-coupled connection from output of one gate to the input of another gate?

a)

Synchronous

b)

Asynchronous

c)

Both

d)

None of the above

13.

What is/are the crucial function/s of memory elements used in the sequential circuits?

a)

Storage of binary information

b)

Specify the state of sequential

c)

Both a & b

d)

None of the above

14.

Asynchronous circuits are useful in application where the input signals may

a)

change at any time

b)

never change

c)

both a and b

d)

None

15.

In asynchronous circuit, the changes occur with the change of

a)

input

b)

output

c)

clock pulse

d)

time

16.

The present states and next state of asynchronous circuits are also called

a)

secondary variables

b)

primary variables

c)

excitation variables

d)

short term memory

17.

The race in which stable state depends on order is called

a)

critical race

b)

identical race

c)

non critical race

d)

defined race

18.

A Condition occurs when an Asynchronous sequential circuit changes two or more binary states variables

a)

deadlock condition

b)

Running condition

c)

Race condition

d)

None

19.

Time delay device is the memory element of

a)

Unclocked flip-flops

b)

clocked flip-flops

c)

synchronous circuits

d)

asynchronous circuits

20.

Each logic gate gives delay of

a)

1 to 5 ns

b)

2 to 10 ns

c)

3 to 10 ns

d)

3 to 5 ns

21.

The effect of change in input more than one state is called

a)

undefined condition

b)

race condition

c)

reset condition

d)

ideal condition

22.

The change in state occurs during

a)

pulse transition

b)

outputs

c)

clock pulses

d)

inputs

23.

Race condition is present in

a)

synchronous logic circuit

b)

asynchronous logic circuit

c)

ideal logic circuit

d)

both a and b

24.

Memory is a/an ___________

a)

Device to collect data from other computer

b)

Block of data to keep data separately

c)

Indispensable part of computer

d)

Device to connect through all over the world

25.

CD-ROM refers to __________

a)

Floppy disk

b)

Compact Disk-Read Only Memory

c)

Compressed Disk-Read Only Memory

d)

Compressed Disk- Random Access Memory

26.

Data stored in an electronic memory cell can be accessed at random and on demand using __________

a)

Memory addressing

b)

Direct addressing

c)

Indirect addressing

d)

Control Unit

27.

The full form of PLD is __________

a)

Programmable Large Device

b)

Programmable Long Device

c)

Programmable Logic Device

d)

Programmable Lengthy Device

28.

The evolution of PLD began with __________

a)

EROM

b)

RAM

c)

PROM

d)

EEPROM

29.

The full form of EPROM is __________

a)

Easy Programmable Read Only Memory

b)

Erasable Programmable Read Only Memory

c)

Eradicate Programmable Read Only Memory

d)

Easy Programmable Read Out Memory

30.

PLDs with programmable AND and fixed OR arrays are called __________

a)

PAL

b)

PLA

c)

APL

d)

PPL

31.

ASIC stands for __________

a)

Application Special Integrated Circuits

b)

Applied Special Integrated Circuits

c)

Application Specific Integrated Circuits

d)

Applied Specific Integrated Circuits

32.

FPGA stands for __________

a)

Full Programmable Gate Array

b)

Full Programmable Genuine Array

c)

First Programmable Gate Array

d)

Field Programmable Gate Array

33.

The difference between FPGA and PLD is that __________

a)

FPGA is slower than PLD

b)

FPGA has high power dissipation

c)

FPGA incorporates logic blocks

d)

All of the Mentioned

34.

Which of the following is a reprogrammable gate array?

a)

EPROM

b)

FPGA

c)

Both EPROM and FPGA

d)

ROM

35.

Which of the following has the lowest access time?

a)

RAM

b)

ROM

c)

Registers

d)

Flag