WorksheetsKishkindha UniversityPre-requisite for Basic Electronics-2023
Total questions: 50
Worksheet time: 25mins
Name
Class
Date
1.
1. A P-type semiconductor is
a)
a) a possibility charged
b)
b) negatively charged
c)
c) uncharged
d)
d) unchar ged at 0 K but charged at higher temperature
2.
2. Bridged rectifier uses
a)
a) four diodes
b)
b) six diodes
c)
c) two diodes
d)
d) one diode
3.
3. The Boolean expression of an OR gate is
a)
a) A.B
b)
b) A’B+AB’
c)
c) A+B
d)
d) A’B’
4.
4. The gate which is used to reverse the output obtained is
a)
a) NOR
b)
b) NAND
c)
c) XOR
d)
d) NOT
5.
5. Which of the following gate will give a 0 when both
a)
a) AND
b)
b) OR
c)
c) NAND
d)
d) XOR
6.
6. In boolean algebra, the bar sign (-) indicates
a)
a) OR operation
b)
b) AND operation
c)
c) NOT operation
d)
d) None of the above
7.
7. Which gate is known as universal gate
a)
a) NAND
b)
b) AND
c)
c) OR
d)
d) None
8.
8. Which of the following are the arithmetic logic gates
a)
a) XOR
b)
b) XNOR
c)
c) Both (a) and (b)
d)
d) None
9.
9. Which of the following signifies a NOT gate
a)
a) 1(input)-0(output)
b)
b) 1_0(input)-1(output)
c)
c) 0_0(input)-0(output)
d)
d) None
10.
10. In a N type semiconductor , there are
a)
a) no minority carrier
b)
b) immobile negative ion
c)
c) immobile positive ion
d)
d) holes as majority carrier
11.
11. Which are the following is not a logic gate
a)
a) AND
b)
b) OR
c)
c) If
d)
d) NOT
12.
12. Which of the following are the arithmetic logic gates
a)
a) OR
b)
b) XNOR
c)
c) Both
d)
d) None
13.
13. XOR circuits can be constructed using
a)
a) OR gated only
b)
b) AND, OR gates
c)
c) AND, NOT gates
d)
d) AND, NOT, OR gates
14.
14. The gates required to build a half adder are_____
a)
a) XOR gate and NOR gate
b)
b) XOR gate and OR gate
c)
c) XOR gate and AND gate
d)
d) XNOR gate and AND gate
15.
15. The base is 16 for ___ number system
a)
a) binary
b)
b) hexadecimal
c)
c) decimal
d)
d) octal
16.
16. NAND gate combination of
a)
a) OR and NOT
b)
b) NOT and NOR
c)
c) NOT and AND
d)
d) All of the above
17.
17. When both the input signals A and B of the NOR and NAND gate are connected together the output of the resultant circuit will be equivalent to
a)
a) OR
b)
b) AND
c)
c) NOT
d)
d) None of the above
18.
18. Identify the universal logic gate ?
a)
a) OR
b)
b) AND
c)
c) NOT
d)
d) NAND
19.
19. If A=1 and B=0,then in terms of boolean algebra A+B=
a)
a) B
b)
b) A'
c)
c) A
d)
d) None of the above
20.
20. What will be the output of the combination of AND gate and NOT gate if the inputs are A and B
a)
a) A+B
b)
b) (A.B)'
c)
c)A.B
d)
d) A+B
21.
21. The combination of AND gate and NOR gate is
a)
a)NOR
b)
b) NAND
c)
c) XOR
d)
d) XNOR
22.
22. Which type of semiconductor are slowly reluctant at temperature ?
a)
a) intrinsic
b)
b) extrinsic
c)
c) all of the above
d)
d) none of the above
23.
23. The relation between the number of free electrons in semiconductor and its temperature is given as
a)
a) n ∝ T
b)
b) n ∝ T 2
c)
c) n ∝ T 3 / 2
d)
d) n ∝ T 1 / 2
24.
24. Digital circuit can be made by the repeated use of
a)
a) OR
b)
b) NOT
c)
c) NAND
d)
d) None of the above
25.
25. A hole in a semiconductor is defined as
a)
a) a free electron
b)
b) the incomplete part of an electron pair bond
c)
c) a free proton
d)
d) none of these
26.
26. Which logic gate provides output as 0 when both inputs are same
a)
a) XNOR
b)
b) XOR
c)
c) NOR
d)
d) NAND
27.
27. Which gate is called as inverter gate due to difference in input and output
a)
a) NOT
b)
b) NAND
c)
c) OR
d)
d) AND
28.
28. Whose conductivity lies between conductors and insulators
a)
a) Rubber
b)
b) Wood
c)
c) Metals
d)
d) Carbon
29.
29 .In Boolean algebra, which of the following is not equal to zero:
a)
a)A.A'
b)
b)A.0
c)
c) (A+A')'
d)
d) (A'.0)'
30.
30. which of the following Boolean Expression is not correct :-
a)
a)( A'.B')'=A+B
b)
b) (A'+B')'=A.B
c)
c) (A.B)' '=A.B
d)
d) 1'+1'=1
31.
31. A two inputed XOR gate produces an high output only when its both inputs are:-
a)
a) Same
b)
b) Different
c)
c) low
d)
d) High
32.
32. Digital circuits can be made by repetative of:
a)
a) OR gate
b)
b) AND gate
c)
c) NOT gate
d)
d) NAND gate
e)
e) All of the above
33.
33. The output of the combination of the gates shown in tig is
a)
a) A+(A.B)'
b)
b) A.B+A'.B'
c)
c) (A+B).(A.B)'
d)
d) (A+B).(A+B)'
34.
34. Identity the logic opuation performed by given circuit
a)
a) AND gate
b)
b) OR gate
c)
c) NOR gate
d)
d) NAND gate
35.
35. The minimum number of NOR gate required to get AND gate
a)
a) 2
b)
b) 5
c)
c) 3
d)
d) 4
36.
36. The NOR gate is logically equivalent to an OR gate by :-
a)
a) An inverter
b)
b) A NOR gate
c)
c) A NAND gate
d)
d) All of the above
37.
37. The logic gate is an electric circuit which
a)
a) makes logic decisions
b)
b) allows electrons flow only in one
c)
c) works binary algebra
d)
d) Alternate between 0 and 1 Values.
e)
e)All of the above
38.
38. The base is ten for _____number system.
a)
a) Binary
b)
b) Hexadecimal
c)
c) Decimal
d)
d) Octal
39.
39. The base is two for ____ number system.
a)
a) Binary
b)
b) Hexadecimal
c)
c) Octal
d)
d) Decimal
40.
40. How many digits does the binary number system have?
a)
a) 2
b)
b) 4
c)
c) 8
d)
d) 6
41.
41. How many inputs does XOR gate have?
a)
a) Only one
b)
b) Only two
c)
c) Only three
d)
d) One or N inputs
42.
42.A semiconductor is formed _ by bonds
a)
a) covalent
b)
b) electrovalent
c)
c) co-ordinate
d)
d) none of the above
43.
43.The most commonly used semiconductor is___
a)
a) germanium
b)
b) silicon
c)
c)carbon
d)
d)sulphur
44.
44.Semiconductor has generally _ valence electrons
a)
a) 2
b)
b) 3
c)
c) 6
d)
d) 4
45.
45.A n-type semiconductor is _
a)
a) positively charged
b)
b) negatively charged
c)
c) electrically neutral
d)
d)none of the above
46.
46.Who is the developer of computer?
a)
a) Dennis Richie
b)
b) James Gosling
c)
c) Charles Babbage
d)
d) None
47.
47.In computer systems, 1nibble equals to ___ ?
a)
a) 1 bit
b)
b) 4 bits
c)
c) 8 bits
d)
d) 1 Kb
48.
48.The brains of any computer system is___?
a)
a) CU
b)
b) ALU
c)
c) Memory
d)
d) CPU
49.
49.The output of two input OR gate is 0 only when it's
a)
a) both inputs are 0
b)
b) either inputs are 1
c)
c) both inputs are 1
d)
d) either input is 0
50.
50.The NAND gate output will be low if the two inputs are
a)
a) 0 0
b)
b) 0 1
c)
c) 1 0
d)
d) 1 1
100 %
