WorksheetsCombinational Circuits Quiz
Total questions: 136
Worksheet time: 1hrs 11mins
What is a combinational circuit?
A circuit with memory
A circuit whose output depends on the previous input
A circuit whose output depends only on the present combination of inputs
A circuit with no outputs
Which of the following statements is true about combinational circuits?
They use memory elements
Their output depends on both current and previous inputs
They can have multiple inputs and outputs
They operate based on a clock signal
What does a half adder do?
Adds two multi-bit binary numbers
Adds two single-bit binary numbers
Adds three binary numbers
Subtracts two binary numbers
Which of the following components does a full adder have that a half adder does not?
XOR gate
AND gate
Carry-in input
OR gate
A multiplexer (MUX) is used to:
Route one input to several outputs
Select one of many inputs to be routed to the output
Store multiple values in memory
Convert analog signals to digital signals
In a 4-to-1 multiplexer, how many select lines are needed?
1
2
3
4
A demultiplexer (DEMUX) is used to:
Route one input to several outputs
Select one of many inputs to be routed to the output
Combine multiple inputs into one output
Store values in memory
A 1-to-4 demultiplexer has how many outputs?
1
2
3
4
A decoder:
Converts binary data into another digital format
Encodes data into binary format
Selects one output from many
Is a type of memory circuit
Which of the following is an example of an encoder?
Priority encoder
Binary to decimal converter
BCD to seven-segment decoder
All of the above
What distinguishes sequential circuits from combinational circuits?
Use of memory elements
Lack of inputs
Continuous output change
They only operate on analog signals
The output of sequential circuits depend on:
Present inputs
Previous inputs
Both present and previous inputs
Neither present nor previous inputs
What is the main function of a flip-flop?
Perform arithmetic operations
Store a single bit of data
Multiply binary numbers
Convert analog signals to digital
What type of flip-flop is sensitive to edges of the clock signal rather than levels?
D Flip-Flop
SR Flip-Flop
T Flip-Flop
Edge-sensitive flip-flop
Which flip-flop uses NAND gates and an enable input?
S-R Flip-Flop
JK Flip-Flop
D Flip-Flop
T Flip-Flop
An S-R flip-flop is also known as:
Level-triggered flip-flop
Edge-triggered flip-flop
T Flip-Flop
D Flip-Flop
A master-slave JK flip-flop consists of:
Two S-R flip-flops
Two T flip-flops
One D flip-flop and one S-R flip-flop
Two D flip-flops
The D flip-flop is created by:
Using an inverter between J and K terminals of a JK flip-flop
Connecting NAND gates between the S and R inputs
Using a JK flip-flop with both inputs tied together
None of the above
A T flip-flop is created by:
Tying the J and K terminals together on a JK flip-flop
Connecting two D flip-flops together
Adding an enable input to an S-R flip-flop
Using only one input, T
What type of circuits can store and retrieve data?
Combinational circuits
Sequential circuits
Multiplexers
Encoders
Which component allows one output from many possible inputs?
Decoder
Multiplexer
Demultiplexer
Flip-flop
What does the term 'edge-triggered' refer to in flip-flops?
The output changes only at specific instants of time, such as when the clock edge changes
The output changes continuously
The output depends on the input directly
The flip-flop operates without a clock
Which flip-flop is used to divide a clock signal by two?
S-R flip-flop
JK flip-flop
T flip-flop
D flip-flop
In digital circuits, what function does the clock signal provide?
Synchronizes changes in the output
Generates binary data
Adds two numbers
Controls the flow of multiplexed data
Which sequential circuit holds a binary value until triggered?
MUX
Flip-flop
Encoder
Demultiplexer
A combinational circuit can be designed using:
Logic gates
Memory
Only flip-flops
Clock signals
The output of a D flip-flop changes when:
The input changes
The clock signal edge changes
The clock signal is high
The clock signal is low
Which of the following does not belong to combinational circuits?
Multiplexer
Adder
Flip-flop
Decoder
What distinguishes edge-triggered flip-flops from level-triggered flip-flops?
Edge-triggered flip-flops change their output only at the rising or falling edge of a clock signal
Level-triggered flip-flops are faster
Edge-triggered flip-flops are used in analog circuits
Level-triggered flip-flops use combinational logic
Which flip-flop is most suited for counting operations?
JK flip-flop
S-R flip-flop
T flip-flop
D flip-flop
The S-R flip-flop is called level-triggered because:
The output changes according to the logic level of the clock signal
It operates without a clock
It has no memory
It uses NAND gates
Which of the following flip-flops is known for eliminating the indeterminate state of the S-R flip-flop?
JK flip-flop
T flip-flop
D flip-flop
Master-Slave flip-flop
A decoder:
Converts one form of binary to another
Selects a specific output based on the binary input
Combines multiple inputs into one
Stores data in memory
How does a demultiplexer differ from a multiplexer?
What does HDL stand for?
Hardware Description Language
High-Density Logic
High-Level Design
Hardware Design Language
Which of the following is a feature of HDL?
Describing large digital systems using schematics
Describing digital circuits using a text-based language
Manual logic synthesis
Physical implementation
Which HDL is stricter in its syntax and typecasting?
Verilog
VHDL
Assembly
C
What is Verilog?
An acronym
A strict typecasting HDL
A tradename
A schematic-based language
Who filed the first patent on the integrated circuit?
Robert Noyce
Jack Kilby
Gordon Moore
Alan Turing
Who co-founded Intel Corporation?
Jack Kilby
Gordon Moore
Robert Noyce
John von Neumann
In what year was the first single-chip microprocessor introduced?
1965
1971
1983
1990
What is Moore’s Law?
Logic gates double in number every year
The number of transistors on an integrated circuit doubles every two years
Integrated circuits shrink in size every year
Circuit complexity decreases over time
When was VHDL first released?
1971
1983
1985
1990
Which organization standardized VHDL?
Intel
IEEE
IBM
Microsoft
What is the highest level of HDL abstraction?
Circuit level
Algorithmic level
Register transfer level
System level
What is described at the gate level?
How data moves between subsystems
Basic gates and registers
Algorithms for system operations
Material composition
What is described at the register transfer level (RTL)?
Electrical components such as resistors
How data moves between and within subsystems
System-wide specifications
Transistor-level details
What is described at the material level?
System specifications
Algorithms for data manipulation
Basic gates and registers
How materials are combined to implement transistors
In what year did the US Department of Defense sponsor the creation of an HDL tool?
1971
1983
1985
1990
What is a key feature of VHDL?
Loose typecasting
Compatibility with C language
Strict syntax and typecasting
Gate-level descriptions
Which HDL was developed completely independently from VHDL?
Assembly
Verilog
MATLAB
SystemC
What did Gordon Moore predict?
The number of gates would halve every two years
Transistor counts on integrated circuits would double every two years
Microprocessor speed would double every year
Circuit resistance would decrease over time
Which of the following is not a level of HDL abstraction?
Algorithmic level
Material level
Logic level
System level
At what level are transistors, wires, and other electrical components described?
System level
Register transfer level
Gate level
Circuit level
Which organization developed the open standard for Verilog HDL?
US Department of Defense
IEEE
Intel
Apple
What is the primary purpose of HDLs?
Building physical circuits
Describing and simulating digital systems
Writing software applications
Automating algorithm development
When was the first version of VHDL standardized?
1971
1983
1985
1990
What was the main reason for developing VHDL?
To replace Verilog
To automate the design of mechanical systems
To document the behavior of digital systems for the Department of Defense
To create a simulation language for microprocessors
Verilog was developed by which company?
Automated Integrated Design Systems
Intel
IBM
What was the primary initial use of Verilog?
Algorithm development
Digital system documentation
Logic simulation
Circuit manufacturing
At what level of HDL abstraction are broad system specifications described?
Circuit level
Algorithmic level
System level
Register transfer level
In VHDL, which is true about typecasting?
VHDL is more relaxed with typecasting than Verilog
VHDL is stricter in its typecasting than Verilog
Typecasting is not allowed in VHDL
Both VHDL and Verilog use the same typecasting rules
What did Intel introduce in 1971?
Verilog HDL
First single-chip microprocessor
SystemC
Transistor-level design software
How many transistors were in the Intel 4004 microprocessor?
1,000
2,300
5,000
10,000
At what level are basic gates and registers described?
Algorithmic level
System level
Gate level
Material level
Which HDL was developed by Automated Integrated Design Systems?
VHDL
Verilog
SystemC
Assembly
What abstraction level follows the system level?
Algorithmic level
Circuit level
Register transfer level
Gate level
When were the first patents on the integrated circuit filed?
1959
1965
1971
1983
What type of design does HDL typically replace?
Electrical design
Schematic-based design
Algorithmic design
Logic gate design
In which level of HDL abstraction is data manipulation based on system inputs described?
Algorithmic level
Circuit level
Gate level
Register transfer level
In which level of HDL abstraction is data manipulation based on system inputs described?
Algorithmic level
Circuit level
Gate level
Register transfer level
What does the algorithmic level of HDL abstraction focus on?
Material properties
Transistor-level design
Broad system behavior
Breaking down specifications into sub-systems
Which of the following best describes the system level of HDL abstraction?
Describes system-wide specifications
Describes how transistors are manufactured
Describes the movement of data between registers
Describes electrical components like resistors
In Verilog, how does its type casting compare to VHDL?
Verilog has stricter type casting
Verilog has looser type casting
Verilog does not allow type casting
Verilog uses a type casting system similar to Java
What was one of the main goals of the US Department of Defense’s 1983 HDL program?
Develop physical microprocessors
Automate software design
Document digital system behavior across all suppliers
Increase processor speed
Which HDL is more similar to the C programming language?
VHDL
Verilog
Assembly
Python
What type of abstraction is used to describe how electrical components operate, like resistors and transistors?
System level
Algorithmic level
Gate level
Circuit level
Which invention did Jack Kilby receive the Nobel Prize for in 2000?
The integrated circuit
The microprocessor
VHDL
Verilog HDL
Which company was founded by Robert Noyce?
Microsoft
Intel
Apple
Which HDL was developed to support multiple levels of abstraction for digital system design?
Assembly
VHDL
Java
Python
Which language is widely used for custom integrated circuit design?
Verilog
Python
C++
Assembly
What is typically described at the algorithmic level of HDL?
Materials used to build the circuits
Broad specifications for sub-systems
The layout of physical transistors
Electrical characteristics of gates
What is described at the material level of abstraction?
How data is manipulated in a system
Electrical components and their characteristics
How materials are combined to form gates and transistors
Basic logic gates
Which HDL supports logic simulation at multiple levels of abstraction?
Assembly
VHDL
Java
Python
In which year did Robert Noyce file his patent on the integrated circuit?
1959
1965
1971
1983
What is the first step in the classical digital design flow?
Synthesis
Verification
Specifications
Place and route
In the classical design flow, what is described during the specification step?
The high-level architecture
The desired behavior of the design
Gate-level connections
Wiring delays
What is an example of a specification in digital design?
Designing a prime number detector
Selecting the 74HC logic family
Arranging components to minimize area
Performing functional simulation
What is created during the functional design step in the classical digital design flow?
Gate-level schematics
Block diagrams and truth tables
Wiring estimates
Fabrication plans
Which tool is used during the synthesis step in classical design flow?
Floor planner
K-map
Logic analyzer
Oscilloscope
What is the purpose of technology mapping in the classical design flow?
Arrange components for minimal area
Select the technology family for the design
Create a high-level architecture
Implement the design on silicon
During technology mapping, which logic family was used in the example provided?
74HC logic family
CMOS logic family
TTL logic family
NMOS logic family
What is minimized during the place and route step of the classical design flow?
Technology delays
Schematic complexity
Area and length of interconnections
Power consumption
What is verified during the verification step of the classical digital design flow?
The design's truth table
The gate delays and wiring delays
The type of logic gates used
The system-level specifications
What happens after the verification step in the classical design flow?
Functional design
Synthesis
Implementation
Place and route
What distinguishes modern digital design flow from classical flow?
Simulations at each step
Manual gate-level design
Absence of verification step
Direct fabrication
At what stage in modern digital design can functional simulations be performed?
After technology mapping
During gate-level description
During the initial behavioral description
During the implementation stage
What is used to describe the initial design in modern digital design flow?
Block diagrams
HDL behavioral description
Logic gates
Truth tables
What is simulated during the synthesis step in modern digital design?
Wiring delays
Gate-level description
Place and route functionality
Power consumption
What are the main objectives of the synthesis process?
To create wiring delays
To implement a physical design
To match the output of the functional design
To minimize area and length
What is simulated during the technology mapping step in modern digital design?
Power consumption
Technology family selection
Gate delays
Logic synthesis
During which step are wiring delays simulated in modern design flow?
Synthesis
Functional design
Place and route
Verification
Which step comes after place and route in both classical and modern digital design flows?
Verification
Synthesis
Technology mapping
Implementation
In modern digital design, what is included in simulations at every step?
Power consumption data
Timing and wiring information
Floor planning details
Behavioral descriptions
Is included in simulations at every step?
Power consumption data
Timing and wiring information
Floor planning details
Behavioral descriptions
In classical design flow, what is the outcome of the synthesis step?
Block diagrams
Truth tables
Gate-level connections
Behavioral simulations
What is an example of functional design in classical flow?
Creating a block diagram
Selecting a logic family
Verifying wiring delays
Arranging components on a floor plan
What happens in the implementation step of both design flows?
The design is fabricated
Wiring delays are minimized
Behavioral simulation is performed
Power consumption is analyzed
What tool is commonly used in modern digital design for simulation?
Verilog
K-map
Oscilloscope
TTL family
In technology mapping, what is an example of minimizing components?
Using only NAND gates
Using CMOS transistors
Increasing power consumption
Using multiplexers
What is the main focus of the verification step in modern digital design flow?
Checking behavioral description
Ensuring timing and power requirements are met
Creating the block diagram
Selecting the logic family
Which design flow involves more use of automated CAD tools?
Classical digital design flow
Modern digital design flow
Both involve equal use
Neither involves CAD tools
What type of delays are added during the place and route step?
Wiring delays
Gate delays
Power delays
Technology delays
What is the primary benefit of using HDLs in digital design?
They reduce power consumption
They enable simulation of functionality at each step
They eliminate the need for gate-level design
They replace behavioral descriptions
In classical design flow, what tool is used for logic synthesis?
Karnaugh maps
Verilog
CMOS logic
Oscilloscopes
What is the key difference between the place and route step in classical and modern flows?
Classical uses manual arrangement; modern simulates wiring
Modern design skips place and route
Classical focuses on timing, while modern focuses on power
Place and route is not used in modern design
What kind of design is used in modern digital flow?
Hand-drawn schematic design
Automated CAD design
Manual gate-level design
Only analog design
In classical digital design, what is the outcome of the verification step?
Selection of the technology family
Behavioral simulation results
Confirmation that gate and wiring delays meet the design’s requirements
Fabrication layout
What is checked during gate-level simulation in the modern design flow?
Layout complexity
Matching the functional design output
Power consumption
Fabrication processes
What is the final step in both the classical and modern digital design flows?
Place and route
Verification
Implementation
Synthesis
Which digital design process involves floor planning to estimate connections?
Technology mapping
Functional design
Place and route
Behavioral simulation
What type of simulation is performed first in modern digital design?
Gate-level simulation
Functional simulation
Wiring delay simulation
Power analysis simulation
Which step follows the functional design in the modern design flow?
Place and route
Synthesis
Implementation
Verification
Which of the following is typically used during the technology mapping step?
K-map
Wiring analysis
HDL
Truth tables
What is the main function of the place and route step in modern digital design?
Select logic family
Arrange components and simulate wiring delays
Create block diagrams
Perform final verification
What is achieved during the synthesis step in both classical and modern design flows?
Selection of power sources
Functional simulations
Conversion to gate-level schematics
Wiring layout optimization
Which family of logic was chosen in the classical design flow example for cost-effectiveness?
CMOS logic
TTL logic
74HC logic
ECL logic
In modern digital design, what happens at every step of the process?
Fabrication of design
Simulation to verify correctness and requirements
Manual gate-level design
Design without power consumption checks
During functional design in the classical flow, what is typically created?
Truth tables and block diagrams
Power layout
Wiring delays simulations
Technology selection
What is checked during the verification step in modern digital design?
Only wiring layout
Timing and power requirements
Block diagram consistency
Schematic integrity
Which step comes before verification in both design flows?
Technology mapping
Synthesis
Place and route
Functional design
What is the key purpose of technology mapping?
To select the power requirements
To minimize the area and interconnection length
To map gate-level schematics to specific technology
To perform functional simulations
What happens after synthesis in modern digital design flow?
Technology mapping
Functional simulation
Block diagram creation
Implementation
In modern digital design, what is performed after wiring delays are added?
Fabrication
Behavioral simulation
Verification against the original specifications
Functional design update
Which step follows functional simulation in modern digital design?
Place and route
Technology mapping
Synthesis
Implementation
Why are simulations performed at each step of modern digital design?
To generate physical circuits
To verify functionality and meet design specifications
To avoid technology mapping
To skip verification
