Wayground logo

Free Printable Worksheets

Font size

S
M
L
XL
Worksheets

DCF I SEM MCQ Test 2024

Total questions: 70

Worksheet time: 39mins

Name
Class
Date
1.

BCD stands for

a)

binary coded decimal

b)

binary common decimal

c)

basic carrier decimal

d)

based counter decimal

2.

The 10's complement of (4136)10 is

a)

5841

b)

5864

c)

5844

d)

5874

3.

A register is a group of _____ suitable for storing binary information.

a)

counters

b)

adders

c)

flip-flops

d)

substractors

4.

What is the octal equivalent of the binary number 10111101?

a)

675

b)

275

c)

572

d)

573

5.

Ripple counters are sometimes called

a)

synchronous counters

b)

registers

c)

asynchronous counters

d)

program counters

6.

The master-slave J-K flip-flop is effectively a combination of

a)

an SR flip-flop and a T flip-flop

b)

an SR flip-flop and a D flip-flop

c)

a T flip-flop and a D flip-flop

d)

two T flip-flops

7.

The output of half adder is in the form of

a)

sum

b)

carry

c)

sum and carry

d)

None of the above

8.

How many cells are there in an n-variable K-map?

a)

2n

b)

2n+a

c)

2n-a

d)

n²

9.

The D flip-flop is a modification of

a)

JK flip-flop

b)

T flip-flop

c)

RS flip-flop

d)

clocked RS flip-flop

10.

SR-type flip-flop can be converted into D flip-flop, if S is connected to R through

a)

EX-OR gate

b)

inverters

c)

AND gate

d)

full adder

11.

The 2's complement of a binary number is obtained by adding 1's complement. to its

a)

12

b)

10

c)

2

d)

1

12.

What is the octal equivalent of the binary number 10111101.

a)

675

b)

275

c)

572

d)

573

13.

What is the output state of an OR gate if the inputs are 0 and 1?

a)

0

b)

1

c)

Not defined

d)

2

14.

The output of a/an gate is only 1 when all of its inputs are 1.

a)

NOR

b)

XOR

c)

AND

d)

NOT

15.

Boolean Algebra obeys.

a)

Commutative law

b)

Associative law

c)

distributiv vee law

d)

All of the above

16.

How many cells are there in an n-variable K-map?

a)

2n

b)

2n+a

c)

2n-a

d)

n²

17.

Parallel adder is.

a)

sequential circuits

b)

combinational circuits

c)

linear circuits

d)

non-linear circuits

18.

How many inputs and outputs are used to construct a full-adder?

a)

3 inputs and 2 outputs

b)

2 inputs and 1 output

c)

1 input and 1 output

d)

1 input and 2 outputs

19.

The output of half-adder is in the form of.

a)

sum

b)

carry

c)

both a) and b)

d)

None of the above

20.

_____ is used for converting one type of number system into the other form.

a)

Decoder

b)

Encoder

c)

Multiplexer

d)

Demultiplexer

21.

The 1's complement of the binary number 1001010.110

a)

1101010.110

b)

1010101.101

c)

0110111.001

d)

0110101.001

22.

The 10'S complement for (547)10 is

a)

453

b)

435

c)

463

d)

456

23.

The operator precedence for evaluating Boolean expression is

a)

OR, AND, parenthesis, NOT

b)

AND, NOT, parenthesis, OR

c)

NOT, parentheses, AND, OR

d)

Parentheses, NOT, AND, OR

24.

The universal gate is

a)

NAND gate

b)

OR gate

c)

EX-OR gate

d)

NOT gate

25.

The output of AND gate is 1, if

a)

All inputs are O

b)

All inputs are 1

c)

At least one input is 0

d)

At least one input is 1

26.

In Boolean Algebra the bar sigh (-) indicates

a)

AND operation

b)

OR operation

c)

NOT operation

d)

None of the above

27.

A combinational circuit that selects binary information from one of many input lines and directs it to a single output line is

a)

Decoder

b)

Multiplexer

c)

Adder

d)

Subtractor

28.

A combinational circuit that converts binary information from n input lines to a maximum of 2 n unique output lines is

a)

Decoder

b)

Multiplexer

c)

Adder

d)

Subtractor

29.

In which counter does the flip-flop output transition serves as a source for triggering other flip-flop?

a)

Ripple counter

b)

Shift counter

c)

Binary counter

d)

Up-down counter

30.

The counters in which the clock pulses are applied to the CP inputs of all flip-flops are called

a)

Synchronous counters

b)

All counters

c)

Asynchronous counters

d)

Syndicate counters

31.

The 1’s complement of the binary number 1010101·010 is

a)

0101010·110

b)

0101010·100

c)

0101010·111

d)

0101010·101

32.

Binary code for decimal digit requires

a)

1 bit

b)

2 bits

c)

3 bits

d)

4 bits

33.

Which of the following states the associative law?

a)

x + x = x

b)

x + y = y + x

c)

x + (y + z) = (x + y) + z

d)

(xy)’ = x’ + y’

34.

The operator precedence for evaluating Boolean expressions is

a)

OR, AND, parentheses, NOT

b)

AND, NOT, parentheses, OR

c)

NOT, parentheses, AND, OR

d)

parentheses, NOT, AND, OR

35.

The algebraic expression for the exclusive-NOR operation is

a)

F = xy’ + x’y

b)

F = xy + x’y’

c)

F = (x + y)’

d)

F = x + y

36.

The output of OR gate is 1, if

a)

all inputs are 1

b)

all inputs are 0

c)

at least one input is 1

d)

at least one input is 0

37.

A combinational circuit that selects binary information from one of many input lines and directs it to a single output line is

a)

decoder

b)

multiplexer

c)

adder

d)

subtractor

38.

A combinational circuit that converts binary information from n input lines to a maximum of 2n unique output lines is

a)

decoder

b)

multiplexer

c)

adder

d)

subtractor

39.

A sequential circuit that goes through a prescribed sequence of states upon the application of input pulses is called

a)

register

b)

counter

c)

flip-flop

d)

multiplexer

40.

The counters in which the clock pulses are applied to the CP inputs of all flip-flops are called

a)

synchronous counters

b)

all counters

c)

asynchronous counters

d)

syndicate counters

41.

The 9’s complement of (636)₁₀ is

a)

336

b)

363

c)

663

d)

373

42.

When an input electrical signal A = 10100 is applied to a NOT gate, its output signal is

a)

01011

b)

10001

c)

10101

d)

00101

43.

Conversion of binary number 101101₂ to hexadecimal is

a)

37₁₆

b)

2E₁₆

c)

27₁₆

d)

2D₁₆

44.

Flip-flop outputs are always

a)

the same

b)

independent of each other

c)

complimentary

d)

same as inputs

45.

A half-adder adds____bits.

a)

16

b)

8

c)

4

d)

2

46.

A demultiplexer is also known as

a)

data selector

b)

data distributor

c)

decoder

d)

encoder

47.

A shift register can be used for

a)

parallel to serial conversion

b)

serial to parallel conversion

c)

digital delay line

d)

All of the above

48.

Binary Coded Decimal (BCD) numbers express each digit as a

a)

byte

b)

bit

c)

nibble

d)

None of the above

49.

Multiplication of 111₂ by 101₂ is

a)

110011₂

b)

100011₂

c)

111100₂

d)

000101₂

50.

A combinational logic circuit that selects one of several digit inputs and forwards the selected input into a single line is

a)

Multiplexer

b)

Decoder

c)

Encoder

d)

demultiplexer

51.

The other name of D flip-flop is delay flip-flop.

a)

True

b)

False

52.

Decoders are used for converting one type of number system into the other form.

a)

True

b)

False

53.

NAND gate is known as universal gate.

a)

True

b)

False

54.

Parallel counter is also called shift counter.

a)

True

b)

False

55.

Boolean algebra obeys distributive law and commutative law.

a)

True

b)

False

56.

A register is a group of flip-flops suitable for storing binary information.

a)

True

b)

False

57.

Synchronous counter is also called ripple counter.

a)

True

b)

False

58.

S-R type flip-flop can be converted into D flip-flop if S is connected to R through EX-OR gate.

a)

True

b)

False

59.

NAND gate is known as universal gate.

a)

True

b)

False

60.

The master slave J-K flip-flop is effectively a combination of S-R flip-flop and a T flip-flop.

a)

True

b)

False

61.

Decimal number (61)10 to its binary number equivalent is (111101)2

a)

True

b)

False

62.

The AND gate is an electronic circuit that gives a high output only if all inputs are low.

a)

True

b)

False

63.

In a synchronous binary counter, the flip-flop in the lowest order position is complemented with every pulse.

a)

True

b)

False

64.

A product of sums is a Boolean expression containing OR terms, called

sum terms.

a)

True

b)

False

65.

In a synchronous binary counter, the flip-flop in the lowest-order position is complemented with every pulse.

a)

True

b)

False

66.

The D flip-flop is a modification of RS flip-flop.

a)

True

b)

False

67.

An OR gate output is low only if all the inputs are high.

a)

True

b)

False

68.

A BCD counter is a decade counter.

a)

True

b)

False

69.

A decoder is used to change a BCD number into an equivalent decimal number.

a)

True

b)

False

70.

A buffer inverts the input.

a)

True

b)

False