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Digital II UNIT 3,4,5 Quiz

Total questions: 86

Worksheet time: 43mins

Name
Class
Date
1.

A DAC is a

a)

digital-to-analog computer

b)

digital analysis calculator

c)

data accumulation converter

d)

digital-to-analog converter

2.

A type of Error associated with digital to analog converters (DACs) is:

a)

nonmonotonic error

b)

incorrect output codes

c)

offset error

d)

nonmonotic and offset error

3.

In troubleshooting a DAC, we check its performance characteristics, such as______________

a)

nonmonotonicity

b)

differential nonlinearity

c)

low and high gain

d)

all of the above

4.

What is gain error in a DAC

a)

missing codes

b)

error in the slope of the output staircase waveform

c)

more or less input voltage is required for the first step than what is specified

d)

None

5.

A Binary weighted digital to analog converter has an input resistor of 100kΩ. What will be current through the resistor, if the resistor is connected to a 5V Source?

a)

50μA

b)

5mA

c)

500μA

d)

50mA

6.

In a binary weighted DAC, the lowest-value resistor corresponds to

a)

the highest binary weighted input

b)

the lowest binary weighted input

c)

the first input

d)

the last input

7.

As Compared to binary weighted digital to analog DAC converter , the major advantage of the R/2R ladder digital to analog (DAC) is

a)

It only uses two different resistor values

b)

it has a fewer part of the same number of inputs

c)

Its Operation is much easier to analyse

d)

The Virtual Ground is elimated and the circuit is therefore easier to understand and troubleshoot

8.

Which term applies to the maintaining of a given signal level until the next sampling

a)

Holding

b)

Aliasing

c)

shannon frequency sampling

d)

stair-stepping

9.

In analog to digital converter (ADCs) sample - and - hold circuits are designed to

a)

Sample and hold the output of the binary counter during the conversion process

b)

stabilize the comparator threshold voltage during the comparison process

c)

stabilize the input analog signal during the conversion process

d)

sample and hold the D/A converter staircase waveform during the conversion process

10.

What is the Purpose of Sample and Hold Circuit?

a)

To keep temporary memory

b)

Tp hold a voltage constant so an ADC has time to produce an output

c)

To hold a voltage constant so a DAC has time to produce an output

d)

To hold data after multiplexer has selected an output

11.

The most common ADC seen in telecommunications based on audio signals is

a)

flash ADC

b)

successive approximation ADC

c)

sigma-delta ADC

d)

dual slope ADC

12.

Identify from the following performance parameter of ADC in which suits the definition of no. of samples per second.

a)

Aliasing

b)

Quantization Error

c)

Resolution

d)

Sampling Frequency

13.

The quantization process

a)

converts the sample-and-hold output to binary code

b)

converts a sample impulse to a level

c)

converts a sequence of binary codes to a reconstructed analog signal

d)

filters out unwanted frequencies before sampling takes place

14.

Aliasing results in

a)

oversampling

b)

undersampling

c)

guard-band formation

d)

perfect sampling

15.

The dual slope analog to digital conver finds extensive use in _____

a)

digital voltmeter

b)

function generators

c)

frequency counters

d)

all of the above

16.

A digital voltmeter uses a

a)

flash ADC

b)

successive approximation ADC

c)

sigma-delta ADC

d)

dual-slope ADC

17.

What is the Primary disadvantage of the Flash analog to digital converter (ADC)?

a)

It requires the input voltage to be applied to the inputs simultaneously

b)

a long conversion time is required

c)

a large number of output lines is required to simultaneously decode the input voltage

d)

a large number of comparators is required to represent a resonable sized binary number

18.

What is the Conversion time of flash converter?

a)

20s

b)

10s

c)

1s

d)

The Conversion takes place continuously

19.

In a flash Analog to Digital convertor,the output of each comparator is connected to an input of a ______________

a)

decoder

b)

priority encoder

c)

multiplexer

d)

demultiplexer

20.

The throughput of a flash ADC is measured in

a)

displacement per second

b)

distance per second

c)

samples per minute

d)

samples per second

21.

The main advantage of the successive - approximation A/D converter over the counter - ramp A/D converter is its:

a)

more complec circuitry

b)

less complex circuitry

c)

longer conversion time

d)

shorter conversion time

22.

The ADC0808 is an example of a _____________

a)

Single -slope analog to digital converter

b)

dual slope analog to digital converter

c)

digital ramp analog to digital converter

d)

successive approximation analog to digital converter

23.

Memory is a/an ___________

a)

Device to collect data from other computer

b)

Block of data to keep data separately

c)

Indispensable part of computer

d)

Device to connect through all over the world

24.

A flip flop stores __________

a)

single bit of information

b)

two bits of information

c)

four bits of information

d)

eight bits of information

25.

A register is able to hold __________ of information

a)

bit

b)

word

c)

nibble

d)

double word

26.

Which of the following parameter of memory defines the section of memory in a single memory array?

a)

Memory Location

b)

Memory Address

c)

Memory Bank

d)

Memory Rank

27.

Which of the following parameter of memory defines the group of chips that make up a memory module that stores data in units such as words or bytes?

a)

Memory Location

b)

Memory Address

c)

Memory Bank

d)

Memory Rank

28.

Which of the following parameter of memory defines the maximum number of bits that can be read or written into the memory at a time?

a)

Memory Location

b)

Memory Address

c)

Memory Bank

d)

Unit of Transfer

29.

Which of the following parameter of memory defines the time taken by RAM to complete read/write operation from the instant that an address is sent to the memory?

a)

Access Time

b)

Memory Cycle Time

c)

Transfer Rate

d)

Unit of Transfer

30.

Which of the following parameter of memory defines the sum of access time & additional time required before a second access can commence in case of RAM ONLY?

a)

Access Time

b)

Memory Cycle Time

c)

Transfer Rate

d)

Unit of Transfer

31.

Data stored in an electronic memory cell can be accessed at random and on demand using __________

a)

Memory Addressing

b)

Direct Addressing

c)

Indirect Addressing

d)

Control Unit

32.

A ROM is defined as __________

a)

Read Out Memory

b)

Read Once Memory

c)

Read Only Memory

d)

Read One Memory

33.

Why are ROMs called non-volatile memory?

a)

They lose memory when power is removed

b)

They do not lose memory when power is removed

c)

They lose memory when power is supplied

d)

They do not lose memory when power is supplied

34.

Which type of ROM has to be custom built by the factory?

a)

EPROM

b)

EEPROM

c)

Masked ROM

d)

PROM

35.

CD-ROM refers to __________

a)

Floppy disk

b)

Compact Disk-Read Only Memory

c)

Compressed Disk-Read Only Memory

d)

Compressed Disk-Random Access Memory

36.

Which of the following memories are magnetic memory type?

a)

Main Memory

b)

Secondary Memory

c)

Static Memory

d)

Volatile Memory

37.

Which of the following memory is an example of sequential access memory?

a)

Floppy Disk

b)

Hard Disk

c)

Magnetic Type Memory

d)

RAM

38.

The full form of PROM is __________

a)

Previous Read Only Memory

b)

Programmable Read Out Memory

c)

Programmable Read Only Memory

d)

Previous Read Out Memory

39.

Which of following processes matches for Fusing process in PROM?

a)

It is Reversible Process

b)

It is Irreverible Process

c)

It is Synchronous Process

d)

It is Asynchronous Process

40.

Which of the following best describes EPROMs?

a)

EPROMs can be programmed only once

b)

EPROMs can be erased by UV

c)

EPROMs can be erased by shorting all inputs to the ground

d)

EPROMs can be erased electrically

41.

The full form of EPROM is __________

a)

Easy Programmable Read Only Memory

b)

Erasable Programmable Read Only Memory

c)

Eradicate Programmable Read Only Memory

d)

Easy Programmable Read Out Memory

42.

Which type ROM can be used to erase the contents by an electrical signal?

a)

ROM

b)

Masked ROM

c)

EPROM

d)

EEPROM

43.

Which of the following is NOT an application of SRAM?

a)

Computer Cache Memory

b)

Digital Cameras & Cell Phones

c)

LCD Screens

d)

Workstations & Servers

44.

How many no. of transistors are used in fabricating a SRAM Chip?

a)

4

b)

5

c)

6

d)

7

45.

Which of the following operations are performed by SRAM?

a)

Write Operation

b)

Read Operation

c)

Refresh Operation

d)

Both a & b ONLY

46.

Which of the following operations are performed by DRAM?

a)

Write Operation

b)

Read Operation

c)

Refresh Operation

d)

All of the above

47.

Which of the following devices used in fabricating a Dynamic RAM ICs?

a)

Capacitor or MOSFET

b)

FET or JFET

c)

Capacitor or BJT

d)

BJT or MOS

48.

Which of the following features best defines about Dynamic RAM?

a)

High power consumptionLarge storage capacity

b)

Low power consumptionLarge storage capacity

c)

Low power consumptionLess storage capacity

d)

High power consumptionLess storage capacity

49.

What is the disadvantage of MOS capacitor in DRAM?

a)

It can't hold the data till a long period

b)

It doesn't holds the charge till a long period

c)

It is highly densed

d)

It is not flexible

50.

With which of the following two memory devices, NVRAM Chip is formed?

a)

EPROM & DRAM

b)

EPROM & SRAM

c)

EEPROM & DRAM

d)

EEPROM & SRAM

51.

Which of following is the most widely used type of NVRAM?

a)

Flash Memory type

b)

Ferroelectric RAM (FeRAM)

c)

Magneto Resistive RAM (MRAM)

d)

SRAM

52.

Which of the following type of NVRAM stores the information in the form of voltage in a capacitor?

a)

Flash Memory type

b)

Ferroelectric RAM (FeRAM)

c)

Magneto Resistive RAM (MRAM)

d)

SRAM

53.

When both the AND and OR are programmable, such PLDs are known as __________

a)

PAL

b)

PPL

c)

PLA

d)

APL

54.

Which of the following approach in digital circuit design work with fixed functions?

a)

Applications Specific Integrated Circuit (ASIC)

b)

Fixed Function ICs

c)

Programmable Logic Devices (PLDs)

d)

None of the above

55.

Which of the following design approach in digital circuits offers HIGHEST RELIABILITY?

a)

Applications Specific Integrated Circuit (ASIC)

b)

Fixed Function ICs

c)

Programmable Logic Devices (PLDs)

d)

None of the above

56.

Which of the following design approach in digital circuits will NOT provide Design Flexibility?

a)

Applications Specific Integrated Circuit (ASIC)

b)

Fixed Function ICs

c)

Programmable Logic Devices (PLDs)

d)

None of the above

57.

Which of the following design approach in digital circuits will have Design Security Issues?

a)

Applications Specific Integrated Circuit (ASIC)

b)

Fixed Function ICs

c)

Programmable Logic Devices (PLDs)

d)

None of the above

58.

The full form of PLD is __________

a)

Programmable Large Device

b)

Programmable Long Device

c)

Programmable Logic Device

d)

Programmable Lengthy Device

59.

The evolution of PLD began with __________

a)

Externally Programmed ROM

b)

RAM

c)

PROM

d)

EPROM

60.

For reprogrammability, PLDs use __________

a)

PROM

b)

EPROM

c)

CDROM

d)

PLA

61.

Why antifuses are implemented in a PLD?

a)

To protect from high voltage

b)

To increase the memory storage

c)

To implement the programmes

d)

As a switching devices

62.

Which of the following is the type of Factory Programmable Logic Devices?

a)

MPGA

b)

PLA

c)

PAL

d)

CPLD

63.

Which of the following is NOT the type of Field Programmable Logic Devices?

a)

CPLD

b)

PLA

c)

PAL

d)

ROM

64.

The full form of PLA is _____________.

a)

Programmable Loaded Array

b)

Programmable Array Logic

c)

Programmable Logic Array

d)

Programmed Array Logic

65.

Which of the following combination best defines Programmable Logic Array (PLA)?

a)

Fixed AND ArrayFixed OR Array

b)

Fixed AND ArrayProgrammable OR Array

c)

Programmable AND ArrayFixed OR Array

d)

Programmable AND ArrayProgrammable OR Array

66.

PAL refers to ____________

a)

Programmable Array Loaded

b)

Programmable Logic Array

c)

Programmable Array Logic

d)

Programmable AND Logic

67.

Which of the following design versions are NOT available in PAL devices?

a)

One-Time Programmable

b)

UV Erasable Version

c)

Flash Erasable Version

d)

None of the above

68.

Which of the following combination best defines Programmable Array Logic (PAL)?

a)

Fixed AND ArrayFixed OR Array

b)

Fixed AND ArrayProgrammable OR Array

c)

Programmable AND ArrayFixed OR Array

d)

Programmable AND ArrayProgrammable OR Array

69.

If a PAL has been programmed once __________

a)

Its logic capacity is lost

b)

Its outputs are only active HIGH

c)

Its outputs are only active LOW

d)

It cannot be reprogrammed

70.

Which of the following output is generated from PAL circuit?

a)

Sum Term Output ONLY

b)

SOP Term Output

c)

Product Term Output ONLY

d)

POS Term Output

71.

Which of the following is/are the basic element/s of FPGA?

a)

Configuration Logic Block (CLB)

b)

Interconnections

c)

I/O Block

d)

all of the above

72.

FPGA stands for __________

a)

Full Programmable Gate Array

b)

Full Programmable Genuine Array

c)

First Programmable Gate Array

d)

Field Programmable Gate Array

73.

Which of the following is a reprogrammable gate array?

a)

EPROM

b)

FPGA

c)

Both a & b

d)

ROM

74.

How FPGA differs from PLD?

a)

FPGA is slower than PLD

b)

FPGA has high power dissipation

c)

FPGA incorporates logic blocks

d)

None of the above

75.

Which of the following display devices are NOT the type of Digital Displays?

a)

Matrix Displays

b)

CRTs

c)

Numeric Displays

d)

Multiplexed Display

76.

In 7 segment display, how many LEDs are used?

a)

7

b)

8

c)

9

d)

10

77.

In seven segment display, which of the following component is used to construct seven segments?

a)

Capacitor

b)

Diodes

c)

Inductor

d)

LED

78.

In a Common Anode Seven Segment Display, which of the segment LEDs are ON for displaying decimal digit '0'?

a)

Segments a, b, c, d, e are ON

b)

Segments a, b, c, d, e, f are ON

c)

Segments a, b, c are ON

d)

Segments a, c, d, e, f, g are ON

79.

In a Common Anode Seven Segment Display, which of the segment LED will be OFF for displaying decimal digit '6'?

a)

Segment b is OFF

b)

Segment c is OFF

c)

Segment d is OFF

d)

Segment g is OFF

80.

Which of the following type of Alphanumeric Display contains LED aligned in the form of Matrix?

a)

Dot-Matrix Display

b)

Mutliplexed Display

c)

Liquid Crystal Display

d)

Twisted Nematic Display

81.

Which of the following factor is NOT an ADVANTAGE of Multiplexed Displays?

a)

fewer wires are needed for connection

b)

reduced cost

c)

reduced power consumption

d)

None of the above

82.

The full form of LCD is ____________

a)

Liquid Crystal Display

b)

Logical Crystal Display

c)

Logical Crystalline Display

d)

Liquid Crystalline Display

83.

Select the operating voltage range for LCDs.

a)

3 to 15V

b)

10 to 15V

c)

15 to 24V

d)

10 to 32V

84.

What is backplane in LCD?

a)

The ac voltage applied between segment and a common element

b)

The dc voltage applied between segment and a common element

c)

The amount of power consumed

d)

For adjusting the intensity of the LCD

85.

Which of the following type of LCD is used in Watches & Calculators?

a)

Direct Address LCD

b)

Passive Matrix Display

c)

Active Matrix Display

d)

Twisted Nematic Display

86.

Which of following DO NOT describe Active Matrix LCD?

a)

High Contrast

b)

High Resolution

c)

High Viewing Angle

d)

High Cost