WorksheetsDDCO_LAB_QUIZ- By Gururaj Surampalli
Total questions: 15
Worksheet time: 11mins
Given a 4-variable logic expression, which techniques can be used to simplify it?
Karnaugh Map (K-Map)
Boolean Algebra
De Morgan's Theorems
Tabular Method
Which of the following only gate can be used to implement a simplified 4-variable logic expression?
AND gate
OR gate
NOT gate
NAND gate
Which gates are used in the design of a 4-bit full adder?
AND gate
OR gate
XOR gate
NOR gate
What components are necessary to design a 4-bit subtractor?
Full adder circuits
XOR gates
NOT gates
Multiplexers
Which modeling styles are used in Verilog HDL to implement simple circuits?
Structural model
Gate-level mode
Behavioral model
Data flow model
Which constructs are commonly used in the structural model of Verilog HDL?
Modules
Instances
Continuous assignments
Initial blocks
Which components are essential for implementing a binary adder-subtractor using Verilog HDL?
Half adder
Full adder
Half subtractor
Full subtractor
Which operations can a binary adder-subtractor perform?
Sum
Difference
Mod Operation
Negation
What are key components of a decimal adder in Verilog HDL?
BCD (Binary-Coded Decimal) adder
Carry look-ahead adder
Ripple carry adder
Multiplexer
Which types of multiplexers can be implemented using Verilog HDL?
2:1 multiplexer
8:1 multiplexer
Octal to Binary
BCD to 7 segment
What are the key parameters to define a multiplexer in Verilog HDL?
Number of inputs
Select lines
Clock signal
Output
Which types of converter can be implemented using Verilog HDL?
BCD to Octal
Binary to Hex
BCD to 7 Segment
Priority Encoder
What types of flip-flops can be implemented using Verilog HDL?
SR flip-flop
JK flip-flop
D flip-flop
T flip-flop
Which signals are commonly associated with flip-flops in Verilog HDL?
Clock signal
Reset signal
Data input
Preset
Which characteristics distinguish different types of flip-flops?
Propagation delay
Output
Input
Action
