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MCQ - Operating Systems & Architecture

Total questions: 83

Worksheet time: 42mins

Name
Class
Date
1.

For 3 page frames, the following is the reference string: 7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1. How many page faults does the LRU page replacement algorithm produce (including page faults when the frames were free)?

a)

11

b)

10

c)

13

d)

12

2.

For 3 page frames, the following is the reference string: 7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1. How many page faults does the Optimal page replacement algorithm produce (including page faults when the frames were free)?

a)

11

b)

9

c)

8

d)

10

3.

For 3 page frames, the following is the reference string: 7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1. How many page faults does the FIFO page replacement algorithm produce (including page faults when the frames were free)?

a)

14

b)

13

c)

16

d)

15

4.

What is not a main structural element of a computer system?

a)

I/O modules

b)

Main memory

c)

Operating system

d)

Processor

5.

Which of the following element of a computer system stores data and programs?

a)

I/O modules

b)

Processor

c)

Main memory

d)

System bus

6.

Which of the following provides for communication among elements of a computer system?

a)

Main memory

b)

System bus

c)

AC

d)

Processor

7.

Which of the following element of a computer system moves data between the computer and its external environment?

a)

Main memory

b)

Registers

c)

System bus

d)

I/O modules

8.

The processor contains a single data register, called

a)

MAR

b)

IR

c)

PC

d)

AC

9.

This register specifies a particular input/output device

a)

MAR

b)

I/OAR

c)

I/OBR

d)

PC

10.

This register is used for the exchange of data between an I/O module and the processor

a)

AC

b)

I/OAR

c)

I/OBR

d)

IR

11.

This register contains the data to be written into memory or which receives the data read from memory

a)

Memory buffer register

b)

Instruction register

c)

Memory address register

d)

Accumulator

12.

This register specifies the location in memory for the next read or write

a)

Accumulator

b)

Memory address register

c)

Memory buffer register

d)

Instruction register

13.

Which register contains the address of the next instruction to be fetched?

a)

Instruction register

b)

Program counter

c)

Accumulator

d)

MAR

14.

Which register contains the instruction most recently fetched?

a)

Instruction register

b)

AC

c)

MBR

d)

Program counter

15.

Index register, segment register, and stack register are examples of

a)

Data registers

b)

Control registers

c)

Flag registers

d)

Status registers

16.

Which of the following registers are used by the processor to exchange data with memory?

a)

AC and IR

b)

PC and IR

c)

MAR and MBR

d)

MBR and IR

17.

Which of the following registers are used by the processor to exchange data with Input/output module?

a)

I/OAR and I/OBR

b)

IR and MAR

c)

MAR and MBR

d)

PC and AC

18.

Which of the following element of a computer system controls the operation of the computer and performs its data processing functions?

a)

System bus

b)

Main memory

c)

Processor

d)

I/O modules

19.

For 4 page frames, the reference string: 1 2 3 4 2 1 5 6 2 1 2 3 7 6 3 2 1 2 3 6. How many page faults does the LRU algorithm produce?

a)

10

b)

12

c)

11

d)

8

20.

For 4 page frames, the reference string: 1 2 3 4 2 1 5 6 2 1 2 3 7 6 3 2 1 2 3 6. How many page faults does the FIFO algorithm produce?

a)

12

b)

10

c)

13

d)

14

21.

For 4 page frames, the reference string: 1 2 3 4 2 1 5 6 2 1 2 3 7 6 3 2 1 2 3 6. How many page faults does the Optimal algorithm produce?

a)

7

b)

10

c)

9

d)

8

22.

The fetched instruction is loaded into

a)

MAR

b)

PC

c)

AC

d)

IR

23.

At the beginning of each instruction cycle, the processor fetches an instruction from memory. The address is held in

a)

PC

b)

MAR

c)

MBR

d)

IR

24.

At the beginning of each instruction cycle, the processor fetches an instruction from memory. The address is held in

a)

PC

b)

MAR

c)

MBR

d)

IR

25.

The processor is executing 'Load AC from memory'. Choose correct micro-instructions:

a)

PC→MAR, M→MBR, MBR→IR, IR→MAR, M→MBR, MBR→AC

b)

MAR→PC, M→IR

c)

PC→MBR, M→IR, MBR→AC

d)

MBR→IR, M→AC

26.

Process is

a)

a compiler

b)

a program in execution

c)

a thread

d)

an OS

27.

A task in a blocked state

a)

is executing

b)

is in ready state

c)

is waiting for some temporarily unavailable resources

d)

is terminated

28.

System that allows only one process execution at a time is called

a)

Multiprogramming

b)

Real-time systems

c)

Multitasking

d)

Uniprogramming systems

29.

Which of the following is not a process state?

a)

Ready

b)

Blocked

c)

Old

d)

Running

30.

Suppose process is in Blocked state waiting for I/O. When completed, it goes to

a)

Ready state

b)

Terminated

c)

New

d)

Running

31.

Which of the following state transitions is not possible?

a)

Waiting to ready

b)

Ready to running

c)

Blocked to running

d)

Running to waiting

32.

If process executes in its critical section, no others must. This is

a)

Race condition

b)

Starvation

c)

Deadlock

d)

Mutual exclusion

33.

Process is

a)

A unit with instruction sequence, state, and resources

b)

Only a function

c)

Only a thread

d)

Only a class

34.

Interprocess communication

a)

Disables context switching

b)

Blocks memory

c)

Slows processing

d)

Allows processes to synchronize activity

35.

A program is

a)

a single instruction

b)

a compiler

c)

a sequence of instructions

d)

a data packet

36.

Each process in OS has its own

a)

address space

b)

all of the above

c)

code

d)

open files

37.

For each process OS creates and manages

a)

Stack

b)

Queue

c)

Semaphore

d)

Process control block

38.

Listing the sequence of instructions that are executed is called

a)

Debugging

b)

Trace

c)

Tracking

d)

Logging

39.

A process can be terminated due to

a)

Error

b)

Parent request

c)

All of the mentioned

d)

I/O failure

40.

Ready state of process means

a)

New process

b)

Completed

c)

Currently blocked

d)

Scheduled to run after some execution

41.

Interprocess communication means

a)

Communication between two processes

b)

Data storage

c)

File sharing

d)

Communication between threads

42.

A set of processes is deadlocked if

a)

They share no data

b)

Each is blocked and remains so

c)

They all completed

d)

Each is running

43.

Address of next instruction is provided by

a)

Program counter

b)

MBR

c)

MAR

d)

IR

44.

Single thread of control allows

a)

Multiple processes

b)

Only one task at a time

c)

Multitasking

d)

Parallelism

45.

Objective of multiprogramming is

a)

To reduce speed

b)

To maximize CPU utilization

c)

To prevent errors

d)

To increase memory

46.

What is a long-term scheduler?

a)

Selects process to bring into ready queue

b)

Manages memory

c)

Chooses next instruction

d)

Handles I/O

47.

What is a short-term scheduler?

a)

Manages I/O

b)

Handles files

c)

Selects which process to execute next

d)

Schedules memory

48.

Main difference between long and short-term scheduler is

a)

Frequency of execution

b)

Speed

c)

Size of process

d)

Memory use

49.

In multiprogramming environment

a)

No process stored

b)

No memory used

c)

More than one process resides in memory

d)

Only one process

50.

Which of the following state transitions is not possible?

a)

Running to blocked

b)

Blocked to running

c)

Running to ready

d)

Ready to running

51.

Which of these is a synchronization tool?

a)

Semaphore

b)

Compiler

c)

Scheduler

d)

Loader

52.

Mutual exclusion can be provided by

a)

Only locks

b)

None of these

c)

Both (mutex locks, binary semaphor

53.

What is a synchronization tool?

a)

Semaphore

b)

Compiler

c)

Scheduler

d)

Loader

54.

Mutual exclusion can be provided by

a)

Only locks

b)

None of these

c)

Both (mutex locks, binary semaphores)

d)

Only mutex

55.

Priority inversion is when

a)

Tasks run parallel

b)

Low blocks high

c)

High-priority task is blocked by medium

d)

Deadlock occurs

56.

With uniprogramming

a)

Only one process runs; with multiprocessing, many

b)

No parallelism

c)

All run in one core

d)

Only threads exist

57.

IPC allows

a)

Shared cache

b)

Memory duplication

c)

Processes to communicate without shared space

d)

Disk swapping

58.

Message passing allows

a)

Buffer locking

b)

Communication without shared data

c)

Thread control

d)

Shared memory use

59.

Link between two processes is called

a)

Semaphore

b)

Communication link

c)

Data pipe

d)

Queue

60.

Indirect communication means

a)

Semaphore sharing

b)

No communication

c)

Shared memory only

d)

Uses mailbox between processes

61.

In non-blocking send

a)

Message lost

b)

Receiver blocks

c)

Sender waits

d)

Sender sends and resumes

62.

Blocking send, blocking receive

a)

Both sender and receiver wait

b)

Neither wait

c)

Only sender waits

d)

Only receiver waits

63.

Non-blocking send, blocking receive

a)

Sender blocks

b)

Sender continues, receiver waits

c)

Both wait

d)

Both continue

64.

Non-blocking send and receive

a)

Both block

b)

Receiver waits

c)

Sender waits

d)

Neither waits

65.

RPC used for

a)

Same process sync

b)

Communication between processes on different systems

c)

Compiler error

d)

Data loss

66.

Trap/exception is

a)

Scheduler call

b)

Memory fault

c)

Hardware interrupt

d)

Software interrupt from error

67.

Semaphores

a)

Allocate memory

b)

Synchronize to prevent deadlock

c)

Handle I/O

d)

Create threads

68.

4 necessary conditions for deadlock: mutual exclusion, no-preemption, circular wait and

a)

I/O wait

b)

Process wait

c)

Memory leak

d)

Hold and wait

69.

Part of program accessing shared memory invisibly is

a)

Critical section

b)

Shared block

c)

User mode

d)

System block

70.

Banker's algorithm is for

a)

Deadlock avoidance

b)

Process creation

c)

Memory scheduling

d)

Paging

71.

Multiple processes accessing same data concurrently with outcome dependent on access order is

a)

Deadlock

b)

Mutex

c)

Race condition

d)

Critical section

72.

Segment updating shared data is

a)

Critical section

b)

Heap

c)

Stack

d)

Variable section

73.

Mutual exclusion means

a)

All run free

b)

Deadlock safe

c)

Only one process in critical section

d)

Multiple allowed

74.

Min variables to solve critical section problem

a)

Three

b)

Two

c)

Four

d)

One

75.

Un-interruptible unit is

a)

Atomic

b)

Shared

c)

Critical

d)

Threaded

76.

Semaphore is a

a)

Process

b)

Synchronization tool

c)

Resource

d)

Variable

77.

Code that changes semaphore value is

a)

User code

b)

Critical section code

c)

Shared code

d)

ISR

78.

Two kinds of semaphores

a)

Atomic, Non-atomic

b)

Simple, Complex

c)

Counting, Binary

d)

Threaded, Non-threaded

79.

Binary semaphore values are

a)

1, 2

b)

0, 1

c)

0, 2

d)

0, -1

80.

Monitor is a

a)

Semaphore

b)

High level sync construct

c)

Low-level API

d)

Thread

81.

Reusable resource is

a)

Stack

b)

Shared cache

c)

Used by one process, not depleted

d)

Temporary file

82.

System is in safe state if

a)

Neither

b)

Only b

c)

Both a and b

d)

Only a

83.

Which is deadlock avoidance algo?

a)

LRU

b)

FIFO

c)

Round Robin

d)

Banker's algorithm