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Worksheets

Flip-Flops in Digital Circuits

Total questions: 14

Worksheet time: 12mins

Name
Class
Date
1.

What happens when J=0 and K=0 in a JK Flip-Flop?

a)

No change

b)

Set

c)

Reset

d)

Toggle

2.

What is the output of the JKMS Flip-Flop when J=0 and K=1?

a)

Q=0 and Q=1

b)

Q=1 and Q=0

c)

No change

d)

Toggle

3.

What is the output of the T Flip-Flop when T=1?

a)

No change

b)

Set

c)

Reset

d)

Toggle

4.

What is the output of a JK Flip-Flop when J=1 and K=0?

a)

Set

b)

Reset

c)

No change

d)

Toggle

5.

What occurs in a T Flip-Flop when T=0?

a)

Reset

b)

No change

c)

Toggle

d)

Set

6.

What is the state of a JK Flip-Flop when J=1 and K=1?

a)

Toggle

b)

Reset

c)

No change

d)

Set

7.

What are the inputs of a JK Flip-Flop?

a)

A) J and CLK

b)

B) J, K, and CLK

c)

C) J, K, Q

d)

D) D and CLK

8.

Which Flip-Flop is commonly referred to as a "divide by 2 counter"?

a)

A) JK Flip-Flop

b)

B) D Flip-Flop

c)

C) T Flip-Flop

d)

D) SR Flip-Flop

9.

Which flip-flop is also called a "universal flip-flop"?

a)

A) D Flip-Flop

b)

B) SR Flip-Flop

c)

C) JKMS Flip-Flop

d)

D) T Flip-Flop

10.

What logic gate is used to convert a JKMS Flip-Flop into a D Flip-Flop?

a)

A) AND gate

b)

B) OR gate

c)

C) NOT gate

d)

D) NAND gate

11.

What is the function of the ‘S’ input in flip-flops?

a)

A) Toggle the output

b)

B) Store data

c)

C) Set the output to 1

d)

D) Reset the output

12.

What does Q′ represent in flip-flop diagrams?

a)

A) Complement of Q

b)

B) Same as Q

c)

C) Clock pulse

d)

D) Input signal

13.

Which flip-flop is sometimes called a “data latch”?

a)

A) JK Flip-Flop

b)

B) SR Flip-Flop

c)

C) D Flip-Flop

d)

D) T Flip-Flop

14.

The T Flip-Flop output frequency is always:

a)

A) Half of the clock frequency

b)

B) Double the clock frequency

c)

C) Same as the clock frequency

d)

D) Zero