WorksheetsMemory System Design
Total questions: 20
Worksheet time: 7mins
Which characteristic primarily determines how fast a memory system can supply data to the CPU?
Capacity
Latency
Bandwidth
Cost per bit
In a hierarchical memory design, the main goal is to:
Reduce the total memory cost
Simulate a fast and large memory at a reasonable cost
Maximize cache hits only
Eliminate secondary storage access
A cache memory operates based on the principle of:
Demand paging
Spatial and temporal locality
Data redundancy
Memory fragmentation
When a requested data is not found in the cache, it is termed as:
Cache access
Cache overflow
Cache miss
Cache swap
The register that holds the address of the memory location to be accessed is called:
Memory Data Register (MDR)
Memory Address Register (MAR)
Instruction Register (IR)
Program Counter (PC)
Which of the following best describes virtual memory?
A technique for storing programs permanently in ROM
A process of compressing memory data
A method for extending main memory capacity using secondary storage
A cache memory replacement strategy
In a demand paging system, when a page not in memory is accessed, this event is called:
Page allocation
Page replacement
Page fault
Page mapping
Which page replacement algorithm can suffer from Belady's anomaly?
LRU
FIFO
Optimal
Random
Which of the following is a non-volatile memory?
DRAM
SRAM
ROM
Cache
In terms of cost and performance, which statement is correct?
Cache is cheaper but slower than main memory.
Main memory is faster than cache.
Secondary memory is faster than cache.
Cache is faster but more expensive per bit than main memory.
The main purpose of cache memory is to increase the total storage capacity of the computer.
True
False
In virtual memory, all processes are loaded entirely into main memory before execution.
True
False
The Least Recently Used (LRU) algorithm replaces the page that has not been accessed for the longest time.
True
False
A higher cache hit ratio indicates better system performance.
True
False
ROM is volatile because its content is erased when power is turned off.
True
False
Increasing cache size always guarantees improved performance.
True
False
Bandwidth measures how many bits can be transferred per unit time.
True
False
A page fault always indicates an error in the program's code.
True
False
The MAR and MDR are essential for communication between CPU and main memory.
True
False
The hierarchy of memory is designed to use slower memory technologies at all levels to minimize power consumption.
True
False
