In S-R flip-flop, if Q = 0 the output is said to be ___________

conversion of flip flops

Quiz
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Professional Development
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University
•
Medium
Viji Lakshmi
Used 4+ times
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10 questions
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1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
a) Set
b) Reset
c) Previous state
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
The flip-flops which has not any invalid states are _____________
a) S-R, J-K, D
b) S-R, J-K, T
c) J-K, D, T
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Sequential circuit contains
a) No memory element
b) Atleast one memory element
c) All inputs applied simultaneously
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
T Flip flop is used as
Transfer data circuit
Toggle switch
Time delay switch
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
The advantage of a J-K flip-flop over an S-R FF is that ________.
A.it does not require a clock input
B.it has only one output
C.it has no invalid states
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Following flip flop is used to eliminate race around problem
SR Flip flop
JK Flip flop
Master Slave Flip flop
7.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
In a J-K flip-flop, if J=K the resulting flip-flop is referred to as
D flip-flop
T flip-flop
S-K flip-flop
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