ARM Cortex M3

The first half word in the 32 bit Thumb-2 instruction________

• Determines the instruction length and functionality

• Determines the instruction length

• Determines the instruction functionality

• Determines address fetch

In little-endian format

• The byte with the lowest address in a word is the least-significant byte of the word.

• The byte with the lowest address in a word is the most significant byte of the word.

• The byte with the highest address in a word is the least significant.

• The byte at address 0 of the memory system connects to data lines 31-24.

Why ARM Cortex M is bit core processor?

• Internal registers in the register bank are 32-bits

• Data paths are 32-bits

• Bus Interfaces are 32-bits

• All the three

The Key feature/s of cortex M3 is/are

• Greater performance efficiency, Low power consumption, Improved code density,

• Greater performance efficiency, Interrupts

• Bit banding

• All of these

The address space in ARM is ______

• 4 GB

• 8 GB

• 16 GB

• 64 GB

The sleep modes are invoked by

• Wait -For-Event (WFE) instructions.

• Wait-For-Interrupt (WFI)

• Both WFI and WFE

• None of these

When a subroutine is called, the return address is hold in which register?

• Stack Pointer

• Interrupt register

• Program Counter

• Link register

The peripherals are accessed through the

• Data bus

• System bus

• Address bus

• None

Instruction used to Test equality of two 32-bit values in cortex M3 is called _____.

• TEQ

• TST

• EOR

• None

The Logical Instructions are: ORR, EOR, TEQ, AND, TST, BIC, MOV, MVN Why is the V flag unaffected by the logical data processing instructions?

• Since V flag and C flag are always the same after any logical operations

• Because it will delay the execution of logical operations

• V flag is relevant only when an Arithmetic operation is performed

• None