COA Q2

Acronym for PMD

Acronym for EEPROM

Acronym for TLB

Acronym for CMOS

Acronym for SRAM

Memory Hierarchy pyramid?

a. CPU Register b.Cache Memory c. Primary Memory d. Secondary Memory e. Tertiary Memory

• a,b,c,d,e

• e,d,c,b,e

• b,c,d,a,e

• none of the following

"Topic: ten advanced optimizations of cache performance"

Small and simple first-level caches and way prediction?

• INCREASING CACHE BANDWIDTH

• REDUCING THE HIT TIME

• REDUCING THE MISS PENALTY

• REDUCING THE MISS RATE

"Topic: ten advanced optimizations of cache performance"

Pipelined caches, multibanked caches and nonblocking caches.

• REDUCING THE HIT TIME

• INCREASING CACHE BANDWIDTH

• REDUCING THE MISS PENALTY

• REDUCING THE MISS RATE

"Topic: ten advanced optimizations of cache performance"

The critical word first and merging write buffers.

• REDUCING THE MISS PENALTY

• REDUCING MISS PENALTY

• REDUCING THE HIT TIME

• INCREASING THE CACHE BANDWIDTH

"Topic: ten advanced optimizations of cache performance"

Compiler optimizations.

• REDUCING THE MISS PENALTY

• REDUCING THE MISS RATE

• REDUCING THE MISS PENALTY

• REDUCING THE HIT TIME