STA-2024 Blended Learning Activity

STA-2024 Blended Learning Activity

University

10 Qs

quiz-placeholder

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STA-2024 Blended Learning Activity

STA-2024 Blended Learning Activity

Assessment

Quiz

Professional Development

University

Medium

Created by

Shylashree N

Used 2+ times

FREE Resource

10 questions

Show all answers

1.

MULTIPLE CHOICE QUESTION

45 sec • 1 pt

The approximate external delays at input pin and output pin is defined to STA engine to calculate path delay is at

Post layout phase

Pre layout phase

Inter Layout phase

Intra layout phase

2.

MULTIPLE CHOICE QUESTION

45 sec • 1 pt

The command used to define the constraint to set the capacitance on the output port of the circuit is:

Set_Drive

set_load

Set_max_fanout

set_transition

3.

MULTIPLE CHOICE QUESTION

45 sec • 1 pt

Indentify the command used to fix the constant value for a port:

Set_load

Set_input _capacitance

Set_case_analysis

None of the above

4.

MULTIPLE CHOICE QUESTION

45 sec • 1 pt

To derate any shortest path during OCV analysis the optionused with the "Set_timing_derate" command is :

-late

-rise

-fall

-early

5.

MULTIPLE CHOICE QUESTION

45 sec • 1 pt

In below options, how many values can be used for representing digital signal?

1

4

infinite

2

6.

MULTIPLE CHOICE QUESTION

45 sec • 1 pt

Which check is perfomed to verify the design whether it follows the lambda based rule

LVS

DRC

ERC

Back annotation

7.

MULTIPLE CHOICE QUESTION

45 sec • 1 pt

A sequential element where a multiplexer followed by a D-flip-flop

RS Flip-flop

D Flip-flop

Scan Flip-flop

T Flip-flop

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