
H466 - 1.1 Computer Architecture
Authored by R Eveleigh
Computers
12th Grade
Used 2+ times

AI Actions
Add similar questions
Adjust reading levels
Convert to real-world scenario
Translate activity
More...
Content View
Student View
38 questions
Show all answers
1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which of the following is a component of the Arithmetic and Logic Unit (ALU)?
Program Counter
Accumulator
Data Bus
Control Unit
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which register holds the address of the next instruction to be executed?
Accumulator
Memory Data Register
Program Counter
Current Instruction Register
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which bus is responsible for carrying data between the processor and memory?
Data Bus
Address Bus
Control Bus
Program Counter
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the sequence of steps in the Fetch-Decode-Execute Cycle?
Fetch, Execute, Decode
Decode, Fetch, Execute
Fetch, Decode, Execute
Execute, Fetch, Decode
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which of the following factors does NOT affect the performance of the CPU?
Clock Speed
Number of Cores
Cache
Data Bus
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the purpose of pipelining in a processor?
To increase the clock speed
To improve efficiency
To reduce the number of cores
To increase cache size
7.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which architecture uses separate memory for instructions and data?
Von Neumann architecture
Harvard architecture
Contemporary processor architecture
Fetch-Decode-Execute Cycle
Access all questions and much more by creating a free account
Create resources
Host any resource
Get auto-graded reports

Continue with Google

Continue with Email

Continue with Classlink

Continue with Clever
or continue with

Microsoft
%20(1).png)
Apple
Others
Already have an account?