Surprise Quiz 1 - Digital System Design_mod4

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Which one of the following statements is correct?

• ECL has the least propagation delay

• TTL has the least propagation delay

• CMOS has the highest power dissipation

• TTL has the lowest power consumption

The most important parameter for evaluating and comparing logic families are

• Power dissipation

• Propagation delay

• Noise margin

• Fan-out

The propagation delay of the logic gate

• Increases the power dissipation

• Limit the maximum speed at which circuit can operate

• Increases the logic level for high-state

• None of the above

Determine the output of the logic array in the following figure.

The Xs represent connected link

• AB'+A'B

• 1

• 0

• AB+A'B'

The minimum number of AND and OR gate required for the implementation of Boolean function given using PLA is

• 3 AND and 2 OR

• 4 AND and 2 OR

• 3 AND and 4 OR

• 4 AND and 3 OR

Select the correct statement about PLA (Programmable logic array)

i. PLA is used to implement sequential logic circuit

ii. In PLA we cannot change the functionality after manufacturing

iii. In PLA both AND and OR gate plane are programmable

• i, ii and iii

• ii and iii only

• iii only

• i and iii only

Identify the volatile memory device

• RAM

• ROM

• PROM

• EPROM

Both EPROM and EEPROM are

• Sequential Access Memory

• Read only memory

• Volatile memory

• Destructive memory

The noise margin is

• Amount of noise the logic circuit can withstand

• Difference between VOH and VIH

• Difference between VIL and VOL

• All the above