
Static and Dynamic Logic Gates Quiz
Authored by A.SUGANTHA Dept
Science
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1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which of the following is a characteristic of static logic gates?
Require a clock signal to function
Use only NMOS transistors
Maintain output indefinitely without refresh
Consume power even when idle
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Dynamic logic gates operate in which two phases?
Read and write
Active and sleep
Precharge and evaluate
Setup and hold
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
A major disadvantage of dynamic logic gates is:
High transistor count
Slower speed than static logic
Need for continuous refreshing and sensitivity to noise
High static power consumption
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which logic style generally requires fewer transistors for implementation?
Static CMOS
Dynamic logic
TTL logic
BiCMOS logic
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
In static CMOS logic, what prevents short-circuit current in steady state?
Pull-up resistor
Only one of PMOS or NMOS is ON at a time
High frequency clock
Use of feedback loop
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