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WorksheetsACA 1
Total questions: 30
Worksheet time: 30mins
A source program is usually in _______
Assembly language
Machine level language
High-level language
Natural language
The time delay between two successive initiation of memory operation _______
Memory access time
Memory search time
Memory cycle time
Instruction delay
What is a dedicated computer?
Which does one kind of software
Which is meant for application software only
Which is used by one person only
Which is assigned to one and only one task
Processor without structural hazard is
Faster
Slower
Have longer clock cycle
Have larger clock rate
A collection of lines that connects several devices is called ..............
bus
peripheral connection wires
Both a and b
internal wires
The access time of memory is ............... the time required for performing any single CPU operation.
Longer than
Shorter than
Negligible than
Same as
A pipeline is like ....................
an automobile assembly line
house pipeline
both a and b
a gas line
Data hazards occur when .....................
Greater performance loss
Pipeline changes the order of read/write access to operands
Some functional unit is not fully pipelined
Machine size is limited
What is the control unit's function in the CPU?
To transfer data to primary storage
to store program instruction
to perform logic operations
to decode program instruction
Pipeline implement
fetch instruction
decode instruction
calculate operand
execute instruction
all of abve
Interrupts which are initiated by an instruction are
internal
external
hardware
Software
Dynamic RAMs are best suited to
slow system
large system
one bit system
none of the above
A modem is used to link up two computers via
telephone line
dedicated line
Both of the above
None of the above
Which of the following memories in a computer is volatile?
RAM
ROM
EPROM
ALL
Systems that do not have parallel processing capabilities are
SISD
SIMD
MIMD
MISD
What is characteristic for the organization of a computer architecture?
Size
Dynamic behaviour
Static behaviour
Speed
None of the answers above is correct
Which is the fastest storage unit in a usual memory hierarchy?
Cache
Main memory
Hard disk
Register
The concept of pipe-lining is most effective in improving performance if the tasks being performed in different stages :
require different amount of time
require about the same amount of time
require different amount of time with time difference between any two tasks being same
require different amount with time difference between any two tasks being different
The processes that are residing in main memory and are ready and waiting to execute are kept on a list called
job queue
ready queue
execution queue
process queue
The interval from the time of submission of a process to the time of completion is termed as
waiting time
turnaround time
response time
throughput
The ultimate goal of a compiler is to
Reduce the clock cycles for a programming task.
Reduce the size of the object code.
Be versatile.
Be able to detect even the smallest of errors.
When Performing a looping operation, the instruction gets stored in the ______.
Registers
Cache
System Heap
System Stack
In priority scheduling algorithm
CPU is allocated to the process with highest priority
CPU is allocated to the process with lowest priority
Equal priority processes can not be scheduled
None of the mentioned
Scheduling is :
allowing a job to use the processor
making proper use of processor
all of the mentioned
none of the mentioned
Which of the following statements are true ?
I. Shortest remaining time first scheduling may cause starvation
II. Preemptive scheduling may cause starvation
III. Round robin is better than FCFS in terms of response time
I only
I and III only
II and III only
I, II and III
When multiple-instructions are overlapped during execution of program, then function performed is called
Multitasking
Multiprogramming
Pipelining
Multithreading
In pipelining the task which requires the least time is performed first.
True
False
If a unit completes its task before the allotted time period, then _______
It’ll perform some other task in the remaining time
Its time gets reallocated to a different task
It’ll remain idle for the remaining time
None of the mentioned
To increase the speed of memory access in pipelining, we make use of _______
Special memory locations
Special purpose registers
Cache
Buffers
The periods of time when the unit is idle is called as _____
Stalls
Bubbles
Hazards
Both Stalls and Bubbles
