NEW
Font size
WorksheetsMOS Transistor quiz 1
Total questions: 20
Worksheet time: 41mins
The n-type semiconductor have _______ as majority carriers
Holes
Ions
electrons
positive ions
The n-MOS transistor is made up of
N-type source, n-type drain and p-type bulk
N-type source, p-type drain and p-type bulk
P-type source, n-type drain and n-type bulk
P- type source, p-type drain and n-type bulk
The correct representation of p-MOSFET is
The oxide layer formed in the MOSFET is
Oxides of Non metals
Poly Silicon oxide
Silicon dioxide
Metal oxide
Which of the following terminals does not belong to the MOSFET?
Drain
Gate
Base
Source
A MOSFET has …………… terminals
4
3
5
2
A MOSFET uses the electric field of a ………. to control the channel current
battery
generator
capacitor
all the above
MOSFET can be used as ________
Voltage controlled capacitor
Current controlled capacitor
Voltage controlled inductor
Current controlled inductor
The effective channel length of a MOSFET in saturation decreases with increase in which of the following parameter?
Gate voltage
Drain voltage
Source voltage
Body voltage
For a p channel MOSFET which of the following is not true?
The source and drain are a p type semiconductor
The induced channel is p type region which is induced by applying a positive potential to the gate
The substrate is a n type semiconductor
None of the above
The conductivity of the pure silicon is raised by
Increasing Pressure
Decreasing Temperature
Introducing Dopants (impurities)
Deformation of Lattice
nMOS devices are formed in
p-type substrate of high doping level
n-type substrate of low doping level
p-type substrate of moderate doping level
n-type substrate of high doping level
Source and drain in nMOS device are isolated by
a single diode
four diodes
three diodes
two diodes
The condition for non saturated region is
Vds lesser than Vgs – Vt
Vds greater than Vgs – Vt
Vds = Vgs – Vt
Vgs lesser than Vt
The condition for linear region is
Vgs lesser than Vt
Vgs greater than Vt
Vds lesser than Vgs
Vds greater than Vgs
__________ network to connect the output of 1
pMOS pull up
CMOS
nMOS pull down
all the above
when gate is ___________ nMOS transistor is ON
low
high
high impendence
low or high
By moore's law the transistor count doubling every _______ months
24
20
10
18
In MOS structure for the condition Vg > Vt it will in ___________
inversion region
accumulation region
depletion region
all the above
nMOS transistor the Ids value is '0' for ______________
linear region
cutoff region
saturation region
unsaturated region
