An I/O device is referred to as a __________.*

It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit or by a mechanism that makes repeated use of the add unit of the system.*

A __________ system is a set of interrelated subsystems.*

The______stores data. *

Computer _________ refers to those attributes that have a direct impact on the logical execution of a program.*

When data are moved over longer distances, to or from a remote device, the process is known as __________.

_________ attributes include hardware details transparent to the programmer.*

A common example of system interconnection is by means of a __________.*

The __________ moves data between the computer and its external environment.*

Architectural attributes include __________ .*

It is a(n) _________ design issue whether a computer will have a multiply instruction.*

Computer technology is changing at a __________ pace.*

The __________ performs the computer's data processing functions.*

_________ provide storage internal to the CPU.*

The __________ defines the third generation of computers.*

The memory of the IAS consists of 1000 storage locations called __________.*

The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the clock rate.*

Second generation computers used __________.*

The ENIAC is an example of a _________ generation computer.*

The __________ contains the 8-bit opcode instruction being executed.*

With the __________, Intel introduced the use of superscalar techniques that allow multiple instructions to execute in parallel.*

The __________ measures the ability of a computer to complete a single task.*

One increment, or pulse, of the system clock is referred to as a _________.*

The __________ interprets the instructions in memory and causes them to be executed.*

During the _________ the opcode of the next instruction is loaded into the IR and the address portion is loaded into the MAR.*

The ENIAC used __________.*

The _________ was the world's first general-purpose electronic digital computer.*

The Electronic Numerical Integrator and Computer project was a response to U.S. needs during _________.*

ARM processors are designed to meet the needs of _________.*

A sequence of codes or instructions is called __________.*

A bus that connects major computer components (processor, memory, I/O) is called a __________.*

The __________ are used to designate the source or destination of the data on the data bus.*

The von Neumann architecture is based on which concept?*

The interconnection structure must support which transfer?*

The processing required for a single instruction is called a(n) __________ cycle.*

The data lines provide a path for moving data among system modules and are collectively called the _________.*

A(n) _________ is generated by a failure such as power failure or memory parity error.*

The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the link layer.*

The TL supports which of the following address spaces?*

A __________ is the high-level set of rules for exchanging packets of data between devices.*

Virtually all contemporary computer designs are based on concepts developed by __________ at the Institute for Advanced Studies, Princeton.*

Each data path consists of a pair of wires (referred to as a __________) that transmits data one bit at a time.*

A(n) _________ is generated by some condition that occurs as a result of an instruction execution.*

The QPI _________ layer is used to determine the course that a packet will traverse across the available system interconnects.*

A logical cache stores data using __________.*

The key advantage of the __________ design is that it eliminates contention for the cache between the instruction fetch/decode unit and the execution unit.*

For internal memory, the __________ is equal to the number of electrical lines into and out of the memory module.*

A line includes a _________ that identifies which particular block is currently being stored.*

"Memory is organized into records and access must be made in a specific linear sequence" is a description of __________.*

In reference to access time to a two-level memory, a _________ occurs if an accessed word is not found in the faster memory.*

For random-access memory, __________ is the time from the instant that an address is presented to the memory to the instant that data have been stored or made available for use.*

The ________ consists of the access time plus any additional time required before a second access can commence.*

Internal memory capacity is typically expressed in terms of _________.*

__________ refers to whether memory is internal or external to the computer.*

individual blocks or records have a unique address based on physical location with __________.*

A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk is referred to as a*

The Pentium 4 _________ component executes micro-operations, fetching the required data from the L1 data cache and temporarily storing results in registers.*

__________ is the simplest mapping technique and maps each block of main memory into only one possible cache line.*

When using the __________ technique all write operations made to main memory are made to the cache as well.*

________ increases the prefetch buffer size to 8 bits.

A DDR3 module transfers data at a clock rate of __________ MHz.*

__________ increases the data transfer rate by increasing the operational frequency of the RAM chip and by increasing the prefetch buffer from 2 bits to 4 bits per chip.*

With _________ the microchip is organized so that a section of memory cells are erased in a single action.*

________ can send data to the processor twice per clock cycle.*

Which properties do all semiconductor memory cells share?*

__________ can be caused by harsh environmental abuse, manufacturing defects, and wear.*

Which of the following memory types are nonvolatile?*

In a _________, binary values are stored using traditional flip-flop logic-gate configurations.*