Worksheets4. TermPD
Total questions: 27
Worksheet time: 10mins
Name
Class
Date
1.
IP in vlsi stand for?
a)
Internet Protocol
b)
Investment Property
c)
Intellectual Property
d)
Internaltional Pro
2.
Type of IPs in vlsi?
a)
High IP and Low IP
b)
Soft IP and Hard IP
c)
Complex IP and Simple IP
d)
Temporary IP and Permanent IP
3.
This this the placement of which cell type?
a)
End cap
b)
Well tap
c)
Decap cell
d)
Spare cell
e)
Tie cell
4.
This this the placement of which cell type?
a)
End cap
b)
Well tap
c)
Level shifter
d)
Spare cell
e)
Tie cell
5.
Which is one of the purposes of spare cells
a)
Preserve area for standard cells
b)
Prevent DRC violations
c)
Reduce the noise of signals
d)
Allow modifying design in the future
6.
Function of Decap Cell
a)
Reduce noise
b)
Special cell use for Clock Tree Synthesis
c)
Connect signal of data
d)
Maintain stable supply voltage
7.
SDC stand for?
a)
System Design Check
b)
Synopsys Design Constraints
c)
Standard Design Configuration
d)
Structural Design Control
8.
What is correct about "SDC"
a)
SDC is logical description of the curcuit
b)
SDC determine constraints about timing, perfromance and area
c)
SDC has information about delay, transition time, leakagepower of a cell
d)
SDC contains position, orientation, routing information of the design after PnR
9.
DEF stand for?
a)
Data Emulation Format
b)
Data Exchange Format
c)
Design Exchange Format
d)
Design Emulation Format
10.
A clock signal has frequency of 500Mhz. Clock period is?
a)
0.5 ns
b)
2 ns
c)
5 ns
d)
0.2 ns
11.
This picture is demonstrating ...
a)
Switching power
b)
Leakage power
c)
Short circuit power
d)
Static Power
12.
ECO stand for?
a)
Engineering Change Order
b)
Exclusive Change Optimization
c)
Environmentally Customize Order
d)
Electric Cut Off
e)
Engineer Change Organization
13.
... cell use to reduce power consumption, by shutting off the current to blocks of the circuit that are not in use.
a)
Clock gating
b)
Isolation
c)
Level shifter
d)
Power switch
e)
Decap
14.
Doping is the process that ...
a)
Changing the name of the cell
b)
Changing the size of the cell
c)
Changing the voltage threshold of the cell
d)
Changing the shape of the cell
15.
Which cell is used to prevent latch up
a)
Spare
b)
Decap
c)
Endcap
d)
Welltap
e)
Spare
16.
If well ties are removed is in the picture, this cell is called .... cell
a)
Tap-less
b)
Cap-less
c)
Well-less
d)
Bulk-less
e)
Spare-less
17.
... is used to define power is multi-voltage design
a)
LEF file
b)
DEF file
c)
UPF file
d)
Tech file
e)
SDC file
18.
This is ... view of standard cell
a)
Abstract View
b)
Layout View
c)
Tech view
d)
Good view
19.
Which of these are correctly placed single-height cell
a)
A
b)
B
c)
C
d)
D
20.
Which of these are correctly placed standard cell
a)
A
b)
B
c)
C
d)
D
21.
Which of these are correctly placed double-height cell
a)
A
b)
B
c)
C
d)
D
22.
How are spare cells usually placed in the chip?
a)
At the boundary of the chip
b)
In the center of the chip
c)
Distribute evenly on the chip
d)
Near macro cells
23.
Total power consumption consists of ... (choose all correct answers)
a)
Dynamic Power
b)
Static Power
c)
Battery Power
d)
Threshold Power
24.
Leakage Power is ...
a)
Dynamic Power
b)
Static Power
c)
Battery Power
d)
Threshold Power
e)
Short-circuit Power
25.
This picture is demonstrating ...
a)
Switching Power
b)
Static Power
c)
Short-circuit Power
d)
Threshold Power
26.
Which cell should be used in this case?
a)
Power Island
b)
Tie
c)
Decap
d)
Level Shifter
e)
Power switch
27.
Which standard cell libraries are the input of Physical Design? (choose all correct answers)
a)
Power Library
b)
Physical Library
c)
Logical Library
d)
Gate Level Library
100 %
