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Worksheets

Combinational Logic Circuits

Total questions: 20

Worksheet time: 10mins

Name
Class
Date
1.

The device shown here is most likely a ________

a)

a) Comparator

b)

b) Multiplexer

c)

c) Inverter

d)

d) Demultiplexer

2.

What type of logic circuit is represented by the figure shown below?

a)

a) XOR

b)

b) XNOR

c)

c) AND

d)

d) XAND

3.

A Full adder adds

a)

2 bits

b)

3 bits

c)

4 bits

d)

more than 4 bits

4.

Convert binary to octal: (110110001010)2

a)

A) (5512)8

b)

B) (6612)8

c)

C)(4532)8

d)

D)(130)10

5.

Binary coded decimal is a combination of

a)

A) 2 Binary Digits

b)

B) 3s Binary Digits

c)

C)4 Binary Digits

d)

D)5 Binary Digits

6.

For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the EN' input be HIGH. What is the status of the Y output?


a)

low

b)

HIGH

c)

HIGH IMPEDANCE

d)

DONT CARE

7.

2'S Complement of 1110101010100001010

a)

0001010101011110110

b)

0001010101011110101

c)

0001010101011110100

d)

1101010101011110110

8.

(48)10 - (22)10 = ()2

a)

1011010

b)

0011001

c)

0011010

d)

0011011

9.

AB+A’C+BC=

a)

AB+A’C'

b)

AB+A’C

c)

AB+AC'

d)

AB'+A’C'

10.

110 IS REPRESENTED AS IN SOP & IN POS FORM ABC’=m6 A’+B’+C=M6

a)

AB'C’=m6 A’+B+C=M6

b)

A'BC’=m6 A+B’+C=M6

c)

ABC’=m7 A’+B+C=M6

d)

ABC’=m6 A’+B’+C=M6

11.

THE SOP EQUATION FOR F(A,B,C)= ∑ m(1,2,4,7) IS

a)

Y=A’B’C+ A’BC’+AB’C’+AB

b)

Y=A’B’C+ A’BC’+AB’C’+ABC

c)

Y=A’B’C'+ A’BC’+AB’C’+ABC

d)

Y=A’B’C+ A’BC’+A'B’C’+A'BC

12.

Y=(A+B+C)(A+B’+C’)(A’+B+C’)(A’+B’+C) IS EQUIVALENT TO

a)

F(A,B,C)=∏ M(0,3,5,6)

b)

F(A,B,C)=∏ M(0,3,7,8)

c)

F(A,B,C)=∏ M(0,3,9,4

d)

F(A,B,C)=∏ M(0,1,3,6)

13.

SOP EQUATION IS

a)

Y+Z

b)

X'+Z

c)

Z'+X'

d)

Z'+Y

14.

SOP EQUATION FOR THIS IS

a)

WY+YZ

b)

W'Y'+Y'Z'

c)

W'Y'+Y'Z'

d)

W'Y'+YZ

15.

A n bit parallel adder requires full adders to perform the operation.

a)

n

b)

n+1

c)

n-1

d)

n2

16.

A parallel binary subtractor performs subtraction using

a)

decimal rules

b)

2"s complement method

c)

1's complement method

d)

nines complement method

17.

In the given 4-to-1 multiplexer, if c1 = 1 and c0 = 0 then the output M is

a)

X0

b)

X2

c)

X3

d)

X1

18.

How many select lines would be required for an 8-line-to-1-line multiplexer?

a)

2

b)

3

c)

4

d)

5

19.

The word Demultiplexer means

a)

a) One into one

b)

b) both a & c

c)

c) Many into one

d)

d)One into many

20.

Fig shows Truth Table for active ------enable & active -------- output.

a)

low, high

b)

high, low

c)

low, low

d)

high,high