wayground logo

Free Printable Worksheets

Font size

S
M
L
XL
Worksheets

Computer architechture

Total questions: 50

Worksheet time: 31mins

Name
Class
Date
1.

Explain the truth table for an OR gate.

a)

A | B | Output, 1 | 0 | 1, 0 | 1 | 0, 1 | 1 | 0, 1 | 1 | 1

b)

A | B | Output, 1 | 0 | 0, 0 | 1 | 0, 1 | 0 | 0, 1 | 1 | 0

c)

A | B | Output, 0 | 0 | 0, 0 | 1 | 1, 1 | 0 | 1, 1 | 1 | 1

d)

A | B | Output, 0 | 0 | 1, 0 | 1 | 0, 1 | 0 | 1, 1 | 1 | 0

2.

Describe the working principle of an XOR gate.

a)

XOR gate is a gate that outputs 1 when both inputs are 0.

b)

XOR gate is a gate that outputs 0 when both inputs are 1.

c)

XOR gate is a digital logic gate that gives a high output (1) only when the number of true inputs is odd.

d)

XOR gate is a digital logic gate that gives a high output (1) only when the number of true inputs is even.

3.

Differentiate between a half adder and a full adder.

a)

A half adder is used for subtraction, while a full adder is used for addition.

b)

A full adder adds two single-bit binary numbers.

c)

A half adder adds two single-bit binary numbers, while a full adder adds three single-bit binary numbers.

d)

A half adder adds three single-bit binary numbers.

4.

What is the boolean operation performed by an OR gate?

a)
  1. Equivalent of addition

b)
  1. Equivalent of multiplication

c)
  1. Equivalent of dificsin

d)

Equivalent of subtraction

5.

What is the one’s complement for the binary number 011001

a)
  1. 000111

b)
  1. 100110

c)
  1. 111001

d)
  1. 110001

6.

Which of the following gates can function on a single input?

a)

NOT

b)

AND

c)

OR

d)

NONE

7.

What combination is a NAND gate?

a)

NOT AND

b)
  1. NOT OR

c)
  1. NOT NOT

d)

None of these

8.

1. RTL stands for:

a)

Random transfer language

b)

Register transfer language

c)

Arithmetic transfer language

d)

All of these

9.

1. Which operations are used for addition, subtraction, increment, decrement and complement function:

a)

Bus

b)

Memory transfer

c)

Arithmetic operation

d)

All of these

10.

In which transfer the computer register are indicated in capital letters for depicting its function:

a)

Memory transfer

b)

Register Transfer

c)

Bus transfer

d)

None of these

11.

Which operation is binary type, and are performed on bits string that is placed in register:

a)

Logical micro operation

b)

Arithmetic micro operation

c)

Both

d)

None

12.

In every transfer, selection of register by bus is decided by:

a)

Control signal

b)

No signal

c)

All signal

d)

All of above

13.

is a command given to a computer to perform a specified operation on some given data:

a)

An instruction

b)

Command

c)

Code

d)

None of these

14.

If A and B are the inputs of a half adder, the carry is given by

a)

A EXOR B

b)

A AND B

c)

A OR B

d)

A XOR B

15.

In parts of the processor, adders are used to calculate

a)

Table Indices

b)

Increment and Decrement Operators

c)

Addresses

d)

All of the Above

16.

The Opeartion executed on data stored in registers is called

a)

Macro-operation

b)

Micro-Operation

c)

Bit-Operaton

d)

Byte-Operation

17.

The main virtue for using single Bus structure is

a)

Fast data transfers

b)

Cost effective connectivity and speed

c)

Cost effective connectivity and ease of attaching peripheral devices

d)

None of the mentioned

18.

In a multiplexer, the selection of a particular input line is controlled by ___________

a)

Data controller

b)

Selected lines

c)

Logic gates

d)

Both data controller and selected lines

19.

A certain logic gate with two inputs produces a low output only when both inputs are same; then it is

a)

an EX-OR gate

b)

an OR gate

c)

a NAND gate

d)

an AND gat

20.

The output of an AND gate will be 1 if

a)

At least one of the inputs is at 1.

b)

At most one of the inputs is at 0.

c)

An even number of inputs must be at 1.

d)

None of these.

21.

which of the following functions is referred as complementary?

a)

NAND

b)

NOR

c)

OR

d)

NOT

22.

RAM is usually called

a)

Logical Memory

b)

Physical memory

c)

Conceptual memory

d)

Users Memory

23.

PSW stands for

a)

Process status word

b)

Program status word

c)

Program status width

d)

process status width

24.

The following logic building block can be used to implement any combinational logic circuit

a)

Ex-Or gate

b)

Encoder

c)

Multiplexer

d)

Decoder

25.

The register which holds the address of the location to or from which data are to be transferred is called

a)

Index Register

b)

Instruction Register

c)

Memory Address Register

d)

Memory Data Register

26.

The register used as a working area in CPU is

a)

Program Counter

b)

Instruction Register

c)

Instruction Decoder

d)

Accumualtor

27.

Which of the following register is used in the control unit of the CPU to indicate the next instruction which is to be executed ?

a)

Accumulator

b)

Index Register

c)

Instruction Decoder

d)

Program Counter

28.

The function of program counter (PC) holds

a)

Temporary

b)

Address for Memory

c)

memory Operand

d)

Address of Instruction

29.

This register stores the address of the memory location currently being read from or written to:

a)

PC(Program Counter)

b)

ACC(Accumulator)

c)

MAR(Memory Address Register)

d)

MDR(Memory Data Register)

e)

CIR(Current Instruction register)

30.

Which bus is unidirectional? (Sends data only one way)

a)

Address bus

b)

Data bus

c)

Control Bus

d)

Register bus

e)

Stop bus

31.

A computer uses a combination of :

a)

Chips and peripherals

b)

Monitor and digital pixels

c)

Hardware and software

d)

Keyboard and mouse

32.

Identify the gate

a)

NAND gate

b)

NOR gate

33.

A universal logic gate is one which can be used to generate any logic function. Which of the following is a universal logic gate?

a)

OR

b)

AND

c)

XOR

d)

NAND

34.

Diagram shows a logic gate.

Which of the following will function similar to the logic gate?

a)
b)
c)
d)
35.

Which is the truth table for the AND gate?

a)
b)
c)
d)
e)
36.
What is the output of an OR gate if the inputs are 1 and 0?
a)
0
b)
1
c)
OFF
d)
2
37.

How many different combinations of 1 and 0 are possible with 3 bits?

a)

4

b)

5

c)

6

d)

7

e)

8

38.
Digital Signals have how many defined levels?
a.  0
b.  1
c.  2
d.  infinite
a)
A.
b)
B.
c)
C.
d)
D.
39.

3) The boolean expression of an OR gate is _______

a)

a) A.B

b)

b) A’B+AB’

c)

c) A+B

d)

d) A’B’

40.

4) Which of the following gate will give a 0 when both of its inputs are 1?

a)

a) AND

b)

b) OR

c)

c) NAND

d)

d) EXOR

41.

Which Logic Gate is represented by the symbol given in the image?

a. OR

b. XNOR

c. NOR

d. XOR

a)

A.

b)

B.

c)

C.

d)

D.

42.

What is the output of a NOR gate when both inputs are 0?

a)

0

b)

1

c)

Undefined

d)

None

43.

What is the result of a bitwise OR operation between 10101010 and 11001100

a)

11001100

b)

10101010

c)

11101110

d)

11111111

44.

What is the result of a bitwise AND operation between 11110000 and 11001100

a)

11110000

b)

11001100

c)

11000000

d)

00000000

45.

Performing a bitwise XOR operation between 10101010 and 11111111 results in

a)

01010101

b)

B) 10101010

c)

11111111

d)

00000000

46.

The bitwise operation 1010 & 1110 (using 4 bits) is equivalent to

a)

1110

b)

1010

c)

1010

d)

1000

47.

Performing a left shift by 2 on 00001111 gives

a)

00111100

b)

11000000

c)

00000011

d)

11110000

48.

Performing a right shift by 3 on 11110000 gives

a)

00011110

b)

11100000

c)

00011100

d)

11111000

49.

What is the result of a circular left shift by 2 on 11001100

a)

00110011

b)

11001100

c)

01100110

d)

11110000

50.

A circular right shift by 3 on 10000001 results in

a)

00110000

b)

00110001

c)

00010000

d)

00100000