Font size
Worksheets[4.0] Processor Technology
Total questions: 77
Worksheet time: 44mins
This primary component of the CPU moves data and instructions between main memory and registers
(a)
This primary component of the CPU performs all computation and comparison operations
(a)
This primary component of the CPU is the storage that holds inputs and outputs for the ALU.
(a)
How does the CPU execute the programs?
The ALU reads instructions directly from primary storage, executes them, and stores the results in secondary storage.
The control unit reads the first instruction from primary storage, stores it in a register, reads input (if needed), signals the ALU to perform operations, and executes instructions sequentially until completion.
The CPU's registers fetch instructions, process data directly from I/O devices, and store final results only in secondary storage.
The CPU executes instructions by fetching them from secondary storage, performing operations directly in the ALU, and sending data to I/O devices without intermediate steps.
In this CPU action, data inputs are prepared for transformation into data output.
Execute Cycle
Fetch Cycle
In this CPU action, transformation to data output takes place and data is stored.
Execute Cycle
Fetch Cycle
Which of the following correctly describes the fetch cycle in a CPU?
The fetch cycle involves fetching instructions from secondary storage, combining data inputs, and executing instructions immediately without separating components.
During the fetch cycle, the CPU reads multiple instructions simultaneously, stores them in a single register, and processes all data inputs at once.
The CPU fetches an instruction from primary storage, increments a pointer to the next instruction, separates the instruction into components (instruction code and data input), and stores each component in separate registers.
Which of the following describes the execution cycle in a CPU?
During the execution cycle, the CPU combines instruction code and data inputs directly from memory without using registers and sends the result to the ALU for storage.
The CPU retrieves the instruction code and data inputs from registers, processes the inputs through internal circuits for transformations (e.g., addition, subtraction), and stores the result in a register.
The execution cycle involves retrieving instructions from secondary storage, processing them through the control unit, and storing results directly in memory.
The CPU retrieves instruction code from primary storage, reads data inputs from I/O devices, performs transformations, and stores results directly in secondary storage.
An (a) is a command to the CPU to perform primitive processing functions on specific data inputs, represented as a bit string logically divided into a number of components. It is the LOWEST-LEVEL COMMAND that software can direct a processor to perform.
An instruction has two components. What are they?
Opcode and Operand
Instruction Code and Data Storage Address
Command Type and Memory Pointer
This is a unique binary number of instruction
OpCode
Operand
This is the group of bits that provides the data or the reference to the data that the CPU will use to execute the operation. It can be a data item or location of the data item.
OpCode
Operand
How are the opcode and operand related to the control unit of the CPU?
The opcode determines the type of operation, while the operand specifies the data or its location; the control unit decodes the opcode and fetches the operand for execution.
The operand signals the control unit which hardware to activate, while the opcode provides memory addresses for data retrieval.
The control unit ignores the operand and directly interprets the opcode to perform operations.
The control unit executes the operand as a command and uses the opcode to fetch data from registers.
An (a) collection of instructions that a CPU can process
CPU instruction sets vary in the following ways. Select the correct variations.
number of instructions
Supported data types
Size of instruction, opcodes , and operands
Supported instruction formats and addressing modes
Number and complexity of processing operations performed by each instruction
Instruction sets of different CPUs reflect differences in design philosophy, processor fabrication technology, class of computer system, and type of application software.
TRUE OR FALSE: CPU cost and performance depend on these characteristics.
False, because CPU instruction sets do not have any influence on the cost or performance of the processor.
False, because CPU cost and performance are determined solely by the number of cores and clock speed, and are not influenced by the instruction set.
True, because the design choices in the instruction set influence the underlying hardware architecture, impacting both performance and cost.
An Instruction Set involves data movement. What does the MOVE instruction do?
It copies data bits from one location to another without changing the source location.
It moves the data from one location to another, erasing the original data.
It transfers data between memory and input/output devices.
It changes the bit values in the source location and places them in the destination.
What is the purpose of a load operation?
To transfer data from a register into main memory.
To copy data from one register to another.
To transfer data from main memory into a register.
To move data from one storage device to another.
What is the purpose of a store operation?
To transfer data from a register into main memory.
To copy data from one register to another.
To transfer data from main memory into a register.
To move data from one storage device to another.
What happens to the former bit values in the destination during a MOVE instruction?
They are preserved.
They are incremented.
They remain unchanged unless specified by the instruction.
They are erased and replaced by the new values.
Instruction Sets also involve data transformation. Most primitive data transformation instructions are based on ________
Arithmetic operations
Boolean logic
String manipulation
Memory addressing
There are 6 data transformation instructions. What are these six?
NOT, AND, OR, XOR, ADD, SHIFT
ADD, SUBTRACT, MULTIPLY, DIVIDE, MOVE, COMPARE
OR, AND, COMPARE, ADD, MOVE, POP
NOT, AND, OR, XOR, NAND, XNOR
How are negative numbers represented in most modern computer systems?
Sign-magnitude
Two's complement
One's complement
ASCII encoding
Why doesn't binary addition work for complex data types, such as floating-point and double-precision numbers?
These data types require decimal-based arithmetic for accuracy.
Binary addition only applies to integer values and cannot handle fractional parts.
Complex data types involve multiple components (e.g., exponent, mantissa) that require specialized operations.
Floating-point numbers cannot be represented in binary.
What does the SHIFT operation in data transformation do?
It changes the values of the bits without modifying their positions.
It shifts the bit string to the left or right by a specified number of positions.
It converts the bit string from binary to decimal format.
It combines multiple bit strings into one larger bit string.
How does the SHIFT operation affect the bit string?
It always rotates the bits, wrapping them around to the other end.
It moves the bit string left or right, potentially losing bits off the ends depending on the direction of the shift.
It changes each bit to its inverse (1 becomes 0, and 0 becomes 1).
It reverses the order of the bits but does not move them.
What happens to vacant bit positions after performing a bit shift operation?
The vacant bit positions are filled with zeroes.
The vacant bit positions are filled with the sign bit (for signed numbers).
The vacant bit positions are left unchanged.
The system randomly assigns values to the vacant bit positions.
What does an arithmetic SHIFT instruction perform in terms of arithmetic operations?
It performs addition and subtraction of the operands.
It performs multiplication or division on the value based on the direction of the shift.
It only performs multiplication.
It only performs division.
What does an arithmetic SHIFT operation do when shifting a bit string to the left by 1 bit?
It multiplies the value by four.
It divides the value by two.
It divides the value by four.
It multiplies the value by two.
What happens when an arithmetic SHIFT operation shifts a bit string to the right by 2 bits?
It multiplies the value by four.
It divides the value by two.
It divides the value by four.
It multiplies the value by two.
Why are arithmetic SHIFT instructions more complex when applied to two's complement values?
The leftmost bit is a sign bit and must be preserved.
The rightmost bit needs to be shifted.
The middle bits of the number need to be adjusted.
The bit length of the number is not fixed.
How do most CPUs handle arithmetic SHIFT instructions when applied to two's complement values?
They automatically remove the sign bit.
They perform a logical shift instead.
They provide a separate arithmetic SHIFT instruction that preserves the sign bit.
They don't support SHIFT operations for two's complement values.
What is the primary purpose of sequence control instructions in an instruction set?
To store and retrieve data from memory
To optimize the memory usage
To increase the number of instructions in the program
To alter the flow of instruction execution in a program
This is a sequence control instruction wherein the instruction flow departs from the normal execution
sequence, regardless of any condition.
Unconditional branch
Conditional branch
Halt
This is a sequence control instruction wherein the instruction flow changes only if a specific condition is met
Unconditional branch
Conditional branch
Halt
This is a sequence control instruction that suspends the normal flow of instruction execution and causes the CPU to halt operation.
Unconditional branch
Conditional branch
Halt
What is the purpose of a BRANCH instruction in sequence control?
To execute the next instruction in the normal sequence
To cause the processor to depart from the sequential instruction order
To execute multiple instructions at once
To transfer data between registers
How does the control unit determine where the next instruction is located when a BRANCH instruction is executed?
It consults a register to determine the memory address of the next instruction
It automatically fetches the next instruction from the end of memory
It checks the operand of the current instruction
It uses an external device to fetch the next instruction
What type of instruction is BRANCH implemented as in most CPUs?
LOAD instruction
JUMP instruction
ADD instruction
MOVE instruction
What does the operand in a BRANCH instruction contain?
The data that needs to be processed
The memory address of the next instruction
The opcode for the next instruction
The result of the current instruction
After a BRANCH instruction is executed, where is the operand loaded?
Into the ALU for processing
Into the control unit register used for fetching the next instruction
Into the primary storage for long-term storage
Into the output register for displaying the result
When the HALT instruction is executed, some CPUs cease all operations. What happens in other CPUs?
The HALT instruction is ignored by the CPU
The CPU stores the program’s result to memory
The CPU continues to execute instructions in sequence
The processor jumps to a predetermined memory address, where a portion of the operating system (OS) is stored
What happens when the HALT instruction causes the processor to jump to a predetermined memory address?
The program continues executing as normal
A portion of the operating system is transferred control, terminating the current program
A portion of the operating system is transferred control, restarting the program from the beginning
TRUE OR FALSE:
Complex processing operations can be performed by combining simpler instructions.
True, since CPUs have a limited instruction set, complex tasks are broken down into simpler steps
False, every operation must have a dedicated instruction in the CPU’s instruction set.
Additional instructions are required when new data types are added.
How do modern processes exhibit this?
They use a single ADD instruction that automatically detects and adjusts for different data types.
They rely on the operating system to handle different data types instead of the instruction set.
They require the programmer to manually define how each data type should be added using low-level assembly code.
They provide different ADD instructions in an instructions set to support integer and real numbers.
CPUs of this instruction set computing can handle complex tasks efficiently using fewer instructions, making programming easier but sometimes sacrificing speed.
Ex. Intel x86 processors
Complex Instruction Set Computing
Reduced Instruction Set Computing
CPUs of this instruction set computing can break down tasks into small, efficient steps, making them faster and more power-efficient for many applications
Ex. ARM processors (used in most smartphones)
Complex Instruction Set Computing
Reduced Instruction Set Computing
This is the digital circuit that generates timing pulses and transmits pulses to other devices in the computer. This synchronizes all CPU actions.
(a)
From the perspective of program execution speed, this is the measure of a computer’s processor speed, indicating how many million of instructions the CPU can execute in one second. It is often used to compare the performance of processors.
Millions of Instructions Per Second (MIPS)
FLOPS (Floating Point Operations Per Second)
CPI (Cycles Per Instruction)
Cache Hit Rate
From the perspective of program execution speed, this is the measure of a computer’s processor speed, focusing only on floating-point operations.
Millions of Instructions Per Second (MIPS)
FLOPS (Floating Point Operations Per Second)
CPI (Cycles Per Instruction)
Cache Hit Rate
Why are MIPS/FLOPS considered poor measurement for comparing computer system performance?
Processor instruction set varies widely
CPU performance depends on memory access speed
MIPS and FLOPS account for differences in software optimization.
MIPS and FLOPS directly measure overall system speed
Given the deficiencies of MIPS/FLOPS, what is a better measure of comparative performance between CPUs?
The amount of cache memory
How quickly a specific program is executed
The number of cores in a processor
The theoretical peak performance of a CPU
This provides a temporary storage area for data/information about a currently executing program
(a)
There are two types of registers.
This register typically holds intermediate results or frequently used data values.
General Purpose Registers
Special Purpose Registers
Instruction Registers
Memory Address Registers
There are two types of registers.
These are dedicated registers within the CPU that serve specific functions related to instruction execution.
General Purpose Registers
Special Purpose Registers
Instruction Registers
Memory Address Registers
There are three special purpose registers.
This holds the currently executing instruction fetched from memory
Instruction Register
Instruction Pointer
Program Status Word
There are three special purpose registers.
This is also called the program counter. It points to the address of the next instruction in primary memory. If a jump or branch occurs, it updates to point to the new instruction location.
Instruction Register
Instruction Pointer
Program Status Word
There are three special purpose registers.
This contains the data describing the CPU status and the currently executing program. It tores status flags and control bits related to CPU operation (i.e., indicate actual/potential error conditions, control conditional branch execution, store comparison results).
Instruction Register
Instruction Pointer
Program Status Word
The Program Status Word is a special purpose register that stores status flags. How are these flags stored?
All flags are stored as a single numerical value
Each bit is a separate boolean variable
Flags are stored in general-purpose registers
Each flag occupies a full byte in memory
If the AX register stores arithmetic/logical results, what does the BX register do?
Stores the result of multiplication and division operations only
Controls the flow of program execution
Used for counting loops
Holds addresses in the memory
Stores overflowing bits from the previous register
If the DX register stores extra data for multiplication and division, what does the CX register do?
Stores the result of multiplication and division operations only
Controls the flow of program execution
Used for counting loops
Holds addresses in the memory
Stores overflowing bits from the previous register
What is the relationship between EAX, AX, AH, and AL?
AX is the lower 16 bits of EAX, while AH and AL are the higher and lower 8 bits of AX, respectively.
AX is a 32-bit register, while EAX, AH, and AL are smaller segments of it.
EAX and AX hold only integer values, while AH and AL store floating-point numbers.
AH and AL are separate 16-bit registers independent of AX and EAX.
What is true about the number of bits EAX register and its "sub-registers"?
EAX - 32 bits
AX - 16 bits
AL - 8 bits (1 to 128)
AH - 8 bits (256 to 32768)
EAX - 64 bits
AX - 32 bits
AL - 16 bits (0 to 65535)
AH - 16 bits (65536 to 131072)
EAX - 32 bits
AX - 16 bits
AL - 8 bits (0 to 255)
AH - 8 bits (256 to 65535)
EAX - 16 bits
AX - 8 bits
AL - 8 bits (1 to 512)
AH - 8 bits (1024 to 65536)
What is a "word" in computer architecture?
A unit of data containing a fixed number of bytes or bits
A variable-length unit of data that changes based on CPU load
A single bit that represents a binary value
A special register in the CPU
How does a CPU with a larger word size impact performance?
It performs a given amount of work slower
It reduces memory size requirements
It can process more data at once, improving speed
It makes the CPU consume less power
How does word size influence system bus design?
The bus width should be larger than the CPU word size
The bus width should be smaller than the CPU word size
The bus width should be equal to or larger than the CPU word size
The bus width has no relation to CPU word size
There are four methods to enhance CPU performance.
This method reduces the time the CPU spends waiting for data, allowing it to execute instructions more efficiently.
Memory Cache
Pipelining
Branch Prediction
Multiprocessing
There are four methods to enhance CPU performance.
This is a method of organizing CPU circuity so that multiple instruction can be in different stages of execution at the same time.
Memory Cache
Pipelining
Branch Prediction
Multiprocessing
There are four methods to enhance CPU performance.
This is used by modern CPUs to improve performance by guessing the outcome of a conditional branch (e.g., if statements, loops) before it is actually determined.
Memory Cache
Pipelining
Branch Prediction
Multiprocessing
There are four methods to enhance CPU performance.
This is possible when a computer has two or more CPUs (processors) working together to do tasks faster.
Memory Cache
Pipelining
Branch Prediction
Multiprocessing
[MULTIPLE ANSWERS]
Which of the following are possible implementation of multiprocessing?
Duplicate circuitry for some of all processing stages in a CPU
Duplicate CPUs implemented as separate microprocessors sharing main memory and a single system bus
Duplicate CPUs within a single microprocessor that also contains main memory caches and a special bus to interconnect CPUs
A single CPU with multiple cores that share memory or communication channels for multiprocessing to work
In terms of future computing trends, what is a key characteristic of Optical Processing in CPUs?
It uses superconductors to enhance electrical conductivity
It relies on photon pathways inside the CPU
It replaces transistors with molecular circuits
It utilizes biological components for processing
In terms of future trends, how does Electro-Optical Processing function in computing?
It eliminates electrical components in favor of fully optical systems
It acts as a bridge between electrical and optical computer components
It relies on liquid-based circuits for faster computation
It utilizes artificial intelligence to optimize CPU performance
In terms of future computing trends, what is the fundamental principle behind Quantum Processing?
It uses traditional binary bits but at much higher speeds
It processes data using ultra-fast electrical signals
It relies on quantum states to encode multiple values per bit (qubit)
It reduces heat output in classical CPUs
How many bits in 1 byte?
(a)
How many bytes in 1 WORD?
How many bytes are there in a DOUBLE WORD?
