WorksheetsComputer Architecture and Organization
Total questions: 30
Worksheet time: 15mins
What is computer architecture?
set of categories and methods that specify the functioning, organisation, and implementation of computer systems
set of principles and methods that specify the functioning, organisation, and implementation of computer systems
set of functions and methods that specify the functioning, organisation, and implementation of computer systems
None of the mentioned
What is computer organization?
structure and behaviour of a computer system as observed by the user
structure of a computer system as observed by the developer
structure and behaviour of a computer system as observed by the developer
All of the mentioned
Top level view of computer function and interconnection: Computer components
CPU, GPU, and RAM
RAM, CPU, and motherboard
Motherboard, hard drive, and GPU
CPU, memory, and components
What is the key concept of the von Neumann architecture regarding data and instructions?
Data is stored in the CPU, and instructions are stored in memory.
Data and instructions are stored in a single memory.
Data is stored in memory, and instructions are stored in the CPU.
Data and instructions are stored separately.
What is the purpose of the instruction register (IR) in a processor?
To address memory locations
To perform arithmetic operations
To store data temporarily
To hold the fetched instruction
What is the purpose of the QPI Physical Layer in the QuickPath Interconnect (QPI) architecture?
To control the flow of data
To route packets through the network
To carry signals and manage the transmission of data
To define the rules for exchanging data packets
What is the main advantage of using PCIe over traditional PCI for interconnection in computer systems?
Simpler architecture and lower cost
Lower latency and better scalability
Higher capacity and support for higher data rate devices
Compatibility with legacy devices
While CPU is executing a program, an interrupt exists then it
follows the next instruction in the program
jumps to instruction in other registers
breaks the normal sequence of execution of instructions
stops executing the program
NMI stands for
nonmaskable interrupt
nonmultiple interrupt
nonmovable interrupt
none of the mentioned
What is the high speed memory between the main memory and the CPU called?
Register Memory
Cache Memory
Storage Memory
Virtual Memory
Whenever the data is found in the cache memory it is called as _________
HIT
MISS
FOUND
ERROR
Which of the following is not a write policy to avoid Cache Coherence?
Write through
Write within
Write back
Buffered write
In ____________ mapping, the data can be mapped anywhere in the Cache Memory.
Associative
Direct
Set Associative
Indirect
The transfer between CPU and Cache is ______________
Block transfer
Word transfer
Set transfer
Associative transfer
If the microprocessor has 10 address lines, then the number of memory locations it is able to address is
512
1024
2048
none
Find out the suitable register pair used by CPU to exchange data with the memory from the following list:
MAR and MBR
I/OAR and I/OBR
PC and AC
IR and temporary register
_______________ module contains basic components for accepting data and instruction in some form and converting them to internal forms of signals.
I/O
CPU
Memory
ALU
At the top -level we can characterize the computer system by ___________________________
Internal behavior of each component and the interconnection structure and the control.
Internal function of each component and the interconnection logic and the control
Internal function of each component and the interconnection logic and the control.
External behavior of each component and the interconnection structure and the control.
Which signal acknowledges that the pending interrupt has been recognized.
Interrupt ACK
Transfer ACK
Reset
Bus request
Compute the amount of data, in bytes, that a 32-bit bus can transfer in
a single operation.
16 bytes
4 bytes
32 bytes
64 bytes
Associate the concept of bandwidth with its significance in the
context of a bus.
It refers to the number of devices on the bus.
It determines the width of the bus.
It indicates the maximum speed of data transfer.
It measures the length of the bus cables.
Identify the correct mapping expression used for the Direct mapping
technique.
Block number = (cache line number) modulo (number of blocks in main memory)
main memory block number = (Cache line number) modulo (number of lines in the cache)
Cache line number = (main memory block number) modulo (number of lines in the cache)
Cache line number = (main memory block number) (number of lines in the cache)
Consider a direct mapped (128KB) cache with block size 4 bytes. The
size of main memory is 32 MB. Find the number of bits in Tag.
9 bits
8 bits
10 bits
7 bits
Which set of hardware will perform various function on data depending on control signals applied to the hardware?
In a system utilizing a packet-based transaction protocol, which type
of requests are generated by software layers and transported to I/O
devices via the transaction layer?
The ____________ is a signal emitted by hardware or software when a
process or an event needs immediate attention.
Which allows the operating system to perform certain functions on a
regular basis?
MAR stands for____________
Memory Address Register
Memory Accumulator Register
Memory Address Routine
Memory Audit Routine
Which of the following defines the Write- through in write policy?
writing is done only to the cache.
A modified cache block is written back to the store just before it is replaced.
when data is updated, it is written to both the cache and the back-end storage
a write buffer can be used to hold data being written from the cache to main memory.
The main memory is 4K x 9 and cache memory is 512 X 9 in direct mapping. Tag field of cache memory is _____.
9 bits
6 bits
3 bits
12 bits
