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WorksheetsComputer Architecture 1
Total questions: 35
Worksheet time: 17mins
The _________ controls the I/O devices and transfer of data to and from the primary storage.
LU
AU
ALU
CU
____________ enables the processor to access data quickly whenever they are needed.
CU
Cache
Memory
Register
The set of wires, which carry information in a controlled manner, is called
System bus
Public bus
Private bus
None of these
The ALU works on the instructions and data held in the _______________
Notebook
Registers
Copy Pad
I/O devices
The fastest memory in the computer system is _____________
ROM
RAM
Cache
None of these
A register that keeps track of the next instruction to be executed is called a _____________
Program Counter
Instruction Register
Accumulator
Data Register
A processor only operates on binary data, that is, data composed of 1s and 0s.
True
False
The address bus informs the CPU about the location of of the data residing in the memory.
The ___________ informs the CPU about the location of the data residing in the memory.
Data bus
Address bus
Cache
Control line
The main components (or basic units) of a computer system are
Input/Output unit
Central Process Unit (CPU)
Memory unit (Storage unit)
All the above
The device used to fetch (or bring) instructions and data into a computer system is called
ALU
Control Unit
Input Device
Output Device
______ translates the logical address into a physical address.
MMU
Translator
Compiler
Linker
To store the intermediate results the ALU takes help from:
Registers
Accumulators
Stack
Queue
Where does the decoded instruction is stored in?
Registers
MDR
IR
PC
A register that keeps track of the next instruction to be executed is called a _____________
Program Counter
MAR
MDR
Stack Pointer
The small extremely fast RAM is called as ___________.
Heap
Stack
Cache
Accumulator
The ALU makes use of _________ to store the intermediate results.
Register
Accumulator
Stack
Heap
In _____________ addressing mode, the operand value is directly specified.
Relative
Direct
Indexed
Immediate
CISC stands for ______________________________________.
Complete Instruction Sequential Compilation
Computer Integrated Sequential Compiler
Complex Instruction Set Computer
Complex Instruction Sequential Compilation
The address of the address of the operand is specified in _______________ addressing mode.
immediate
direct
indirect
relative
The register used to store the flags is called as ______________.
Flag register
Status register
Test register
Log register
Which memory device is generally made of semiconductors?
RAM
HARD DISK
FLOPPY DISK
CD DISK
The small extremely fast, RAM’s are called as _______
CACHE
HEAPS
ACCUMULATORS
STACKS
The fetch and execution cycles are interleaved with the help of ________
Modification in processor architecture
Clock
Special unit
Control unit
To increase the speed of memory access in pipelining, we make use of _______
Special memory locations
Special purpose registers
Cache
Buffers
To read the control words sequentially _________ is used.
PC
IR
UPC (MPC)
None of the mentioned
The _________ controls the I/O devices and transfer of data to and from the primary storage.
LU
AU
ALU
CU
____________ enables the processor to access data quickly whenever they are needed.
CU
Cache
Memory
Register
The set of wires, which carry information in a controlled manner, is called
System bus
Public bus
Private bus
None of these
The fastest memory in the computer system is _____________
ROM
RAM
Cache
None of these
A processor only operates on binary data, that is, data composed of 1s and 0s.
True
False
____________ retrieves the data from the storage unit and performs the arithmetic calculations and/or comparisons on them and the processed data is then sent back to the storage.
Control Unit
Arithmetic Logic Unit
Memory Unit
None of the above
What are the two main approaches to Instruction Set Architecture?
Memory and Storage
CISC and RISC
Input and Output
ALU and CU
Which type of computer is designed to meet the needs of an individual?
Super Computer
Main Frame
Work Station
Micro Computer
