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WorksheetsComputer Architecture Quiz 5
Total questions: 43
Worksheet time: 22mins
Indexing performed after the indirection is
relative addressing
autoindexing
postindexing
preindexing
The I/O function includes a ______requirement to coordinate the flow of traffic between internal resources and external devices
cycle
status reporting
control and timing
data
An I/O module must recognize one unique address for each peripheral it controls.
True
False
The method of calculating the EA is the same for both base-register addressing and indexing.
True
False
Both batch multiprogramming and time sharing use multiprogramming.
True
False
A common example of system interconnection is by means of a____
register
system bus
data transport
control device
The ENIAC is an example of a_____ generation computer
first
second
third
fourth
INT 21h/AH=1 is
write character from standard input, entry is stored in AL.
read character from standard input, with echo, result is stored in AL.
write character from standard input, entry is stored in AH.
read character from standard input, with echo, result is stored in AH.
A ____disk is permanently mounted in the disk drive, such as the hard disk in a personal computer.
nonremovable
movable-head
double sided
removable
The set of all the tracks in the same relative position on the platter is referred to as a _________
floppy disk
single-sided disk
sector
cylinder
Because all devices on a synchronous bus are tied to a fixed clock rate, the system cannot take advantage of Advances in device performance
True
False
The number of bits used to represent various data types is an example of an architectural attribute.
True
False
Program execution consists of repeating the process of instruction fetch and instruction execution
True
False
_____are a set of storage locations
Processors
PSWs
Registers
Control units
Scheduling and memory management are the two os functions that are most relevant to the study of computer organization and architecture
True
False
Condition codes facilitate multiway branches
True
False
Which of the following interrelated factors go into determining the use of the addressing bits?
number of operands
number of register sets
address range
all of the above
A characteristic of ROM is that it is volatile.
True
False
_____is the standardized scheme for multiple disk database design.
RAID
CAV
CLV
SSD
The use of multiple processors on the same chip is referred to as_______ and provides the potential to increase performance without increasing the clock rate
multicore
GPU
data channels
MPC
RAID level 0 is not a true member of the RAID family because it does not include redundancy to improve performance
True
False
The ___________cycle occurs at the beginning of each instruction cycle and causes an instruction to be fetched from memory
execute
indirect
fetch
. interrupt
es not include redundancy to improve performance
True
False
The ___________cycle occurs at the beginning of each instruction cycle and causes an instruction to be fetched From memory
execute
indirect
fetch
interrupt
In a volatile memory, information decays naturally or is lost when electrical power is switched off.
True
False
Register addressing is similar to direct addressing with the only difference being that the address field refers to a register rather than a main memory address.
True
False
Semiconductor memory comes in packaged chips.
True
False
It is possible to improve pipeline performance by automatically rearranging instructions within a program so That branch instructions occur later than actually desired
True
False
A computer has memory of 256k words, how many bits are required to specify the address part?
16 bits
12 bits
8 bits
18 bits
10 bits
A sequence of codes or instructions is called
software
memory
an interconnect
a register
With a batch operating system the user does not have direct access to the processor.
True
False
The two traditional forms of RAM used in computers are DRAM and SRAM
True
False
The correspondence between the main memory blocks and those in the cache IS specified by
Mapping function
Replacement algorithm
Hit rate
Miss penalty
Segment function
Microprogramming eases the task of designing and implementing the control unit and provides support for the Family concept
True
False
A_______ hazard occurs when there is a conflict in the access of an operand location
resource
data
structural
control
The most common means of computer/user interaction is a
keyboard/monitor
mouse/printer
modem/printer
monitor/printer
The____contains the 8-bit opcode instruction being executed
memory buffer register
instruction buffer register
instruction register
memory address register
The memory transfer rate has not kept up with increases in processor speed
True
False
The end user IS concerned mainly with the computer’s architecture
True
False
The performance of the cache memory is measured in terms of a quantity called____
Initialization Ratio
Address Ratio
Hit Ratio
Instruction Ratio
Miss Ratio
For internal memory, the____ is equal to the number of electrical lines into and out of the memory Module
access time
unit of transfer
capacity
memory ratio
A_______ is HO electronic circuit that produces 1911 output signal that is и simple Doolware operation on is input signals
gate
decoder
counter
flip-flop
The only form of adda essing for branch instructions is _____addressing
register
Relative
base
immediate
