WorksheetsPrevious MID and External Questionnaire (2018-2024) (unit 3,4,5)
Total questions: 70
Worksheet time: 35mins
Reproduce the truth table of a 1-bit magnitude comparator.
A 1-bit magnitude comparator truth table shows outputs for A>B, A
A 1-bit magnitude comparator truth table only compares A and B for equality.
A 1-bit magnitude comparator truth table shows outputs for A>B and A
A 1-bit magnitude comparator truth table shows outputs for A=B only.
Static Hazard is defined as:
A situation where a change in input causes a momentary incorrect output in a digital circuit.
A permanent fault in a digital circuit.
A type of hazard that occurs only in analog circuits.
A condition where the output remains stable despite input changes.
A symmetric function is defined as:
A function whose value remains unchanged when any of its variables are interchanged.
A function that is always increasing.
A function that is always decreasing.
A function that is periodic.
Define an Unate Function.
A function that is monotonic in each variable, either always increasing or always decreasing.
A function that is periodic in nature.
A function that is always symmetric with respect to its variables.
A function that is constant for all input values.
Which of the following represents the correct excitation table of a T-Flip Flop?
T | Qn | Qn+1
0 | 0 | 0
0 | 1 | 1
1 | 0 | 1
1 | 1 | 0
T | Qn | Qn+1
0 | 0 | 1
0 | 1 | 0
1 | 0 | 0
1 | 1 | 1
T | Qn | Qn+1
0 | 0 | 0
0 | 1 | 1
1 | 0 | 0
1 | 1 | 1
T | Qn | Qn+1
0 | 0 | 1
0 | 1 | 1
1 | 0 | 1
1 | 1 | 1
Reproduce the logic diagram of a twisted ring counter.
A shift register with feedback from the last output to the first input through an inverter.
A simple shift register with no feedback.
A Johnson counter with direct feedback.
A ring counter with parallel load capability.
Realize full adder using 4 X1 multiplexer.
A full adder can be realized using 4 X1 multiplexers by implementing the sum and carry outputs with appropriate selection lines and inputs.
A full adder cannot be realized using 4 X1 multiplexers.
A full adder requires at least 8 X1 multiplexers for realization.
A full adder can only be realized using logic gates, not multiplexers.
Which of the following represents the correct three-bit binary to Gray code conversion for the binary input 101?
111
100
110
101
A Full subtractor can be designed using which suitable decoder?
3-to-8 decoder
2-to-4 decoder
4-to-16 decoder
1-to-2 decoder
Which of the following is the correct hazard-free logic circuit implementation for the boolean function f(A, B, C, D) = Σ m(0, 2, 6, 7, 8, 10, 12)?
f(A, B, C, D) = A'B'C'D' + A'B'C'D + A'BC'D + A'BCD + AB'C'D' + AB'C'D + ABC'D'
f(A, B, C, D) = A'B'C'D' + A'B'C'D + A'BC'D + AB'C'D' + AB'C'D + ABC'D'
f(A, B, C, D) = A'B'C'D' + A'B'C'D + A'BC'D + A'BCD + AB'C'D'
f(A, B, C, D) = A'B'C'D' + A'B'C'D + AB'C'D' + AB'C'D + ABC'D'
Realize the simplified Boolean function for the following Threshold gate.
F = A + B
F = AB + AC
F = A'B + AC
F = AB + BC
Which of the following are two elementary properties, capabilities, and limitations of threshold logic?
Threshold logic can implement basic logic functions and is limited by the inability to realize all Boolean functions.
Threshold logic is only used for arithmetic operations and can realize all Boolean functions.
Threshold logic cannot implement any logic functions and has no limitations.
Threshold logic is used exclusively for memory storage and has unlimited capabilities.
Which of the following is the correct threshold gate implementation for the Boolean function Y(X1, X2, X3) = Σ m(0, 2, 4, 6, 7)?
T = (3, 1, 1, 1)
T = (2, 1, 1, 1)
T = (4, 1, 1, 1)
T = (1, 1, 1, 1)
Which of the following best proves that the function abcd + a’b’c’d’ + a’b’cd’ + a’bc’d’ + ab’c’d’ is symmetric?
The function remains unchanged under any permutation of its variables.
The function is true only for all variables being 1.
The function is true only for all variables being 0.
The function is not affected by the complementation of any variable.
Which of the following state diagrams correctly detects the sequence 110 in a sequence detector?
A diagram with three states: S0 (initial), S1 (after 1), S2 (after 11), and transitions: S0 --1--> S1, S1 --1--> S2, S2 --0--> S3 (final state for 110)
A diagram with two states: S0 (initial), S1 (after 1), and transitions: S0 --1--> S1, S1 --0--> S0
A diagram with four states: S0, S1, S2, S3, and transitions: S0 --1--> S1, S1 --0--> S2, S2 --1--> S3
A diagram with three states: S0, S1, S2, and transitions: S0 --0--> S1, S1 --1--> S2, S2 --1--> S0
A synchronous 3-bit Up counter is designed using:
Three JK flip-flops with parallel clocking
Three D flip-flops with serial clocking
Two JK flip-flops and one T flip-flop
Three SR flip-flops with asynchronous clocking
Which of the following represents the state diagram of a serial adder?
A diagram showing states for carry and sum transitions based on input bits.
A diagram with only one state representing all operations.
A diagram with states for parallel addition only.
A diagram with states for subtraction operations.
Convert JK Flip Flop in to D flip Flop.
By connecting J to D and K to NOT D
By connecting J and K both to D
By connecting J to clock and K to D
By connecting J to ground and K to Vcc
Implement the switching function f (w, x, y, z) = Σ (1, 3, 5, 6, 8, 9, 11, 12, 14, 15) using an 8x1 Multiplexer. Which of the following represents the correct selection and input configuration for the multiplexer?
Use x, y, z as select lines and connect the inputs as: I0=0, I1=1, I2=1, I3=1, I4=0, I5=1, I6=1, I7=0
Use w, x, y as select lines and connect the inputs as: I0=1, I1=0, I2=1, I3=1, I4=1, I5=0, I6=1, I7=1
Use w, x, z as select lines and connect the inputs as: I0=0, I1=1, I2=0, I3=1, I4=1, I5=1, I6=0, I7=1
Use x, y, z as select lines and connect the inputs as: I0=1, I1=0, I2=1, I3=0, I4=1, I5=0, I6=1, I7=1
Obtain minimal expressions for a two-bit comparator.
A = X1X0Y1'Y0' + X1'X0'Y1Y0; B = X1X0Y1Y0' + X1'X0'Y1'Y0
A = X1Y1 + X0Y0; B = X1'Y1' + X0'Y0'
A = X1X0'Y1Y0' + X1'X0Y1'Y0; B = X1X0Y1Y0 + X1'X0'Y1'Y0'
A = X1X0Y1Y0 + X1'X0'Y1'Y0'; B = X1X0'Y1'Y0 + X1'X0Y1'Y0'
For the function, T (w, x, y, z) = Σ (3, 6, 9) + ΣΦ (10, 11, 12, 13, 14, 15), what is the minimum number of springs required for a relay contact network realization?
8 springs
10 springs
12 springs
14 springs
For the function S2,3 (x1, x2, x3), which of the following is a contact network realization with the minimum number of contacts?
A network with 3 contacts
A network with 4 contacts
A network with 2 contacts
A network with 5 contacts
Determine whether the function f (x1, x2, x3, x4) = Σ (0, 1, 3, 4, 5, 6, 7, 12, 13) is a threshold function and, if it is, find a weight–threshold vector.
Yes, it is a threshold function. A possible weight–threshold vector is (1, 1, 1, 1; 2).
No, it is not a threshold function.
Yes, it is a threshold function. A possible weight–threshold vector is (2, 1, 1, 0; 3).
Yes, it is a threshold function. A possible weight–threshold vector is (1, 2, 1, 1; 3).
Test whether the function f (a, b, c) = Σ (3, 5, 6, 7) is unate.
Yes, the function is unate.
No, the function is not unate.
The function is unate only in variable a.
The function is unate only in variable b.
Realize the threshold function given by f (x1, x2, x3, x4) = Σ (0, 2, 4, 6, 7, 12, 14, 15). Which of the following is the correct threshold value for this function?
3
5
7
2
Realize the symmetric function S0,2 (x1, x2) using relay contacts.
By connecting two normally open contacts in parallel.
By connecting two normally closed contacts in series.
By connecting one normally open and one normally closed contact in series.
By connecting two normally open contacts in series.
Which of the following state diagrams correctly represents a sequence detector that detects the sequence 1010 and produces an output Z = 1, coincident with the last input, with overlapping sequences acceptable?
A state diagram with five states: S0 (initial), S1 (after 1), S2 (after 10), S3 (after 101), S4 (after 1010, output Z=1), with transitions for overlapping sequences.
A state diagram with three states: S0 (initial), S1 (after 1), S2 (after 10), with no output for Z and no overlapping sequences.
A state diagram with four states: S0 (initial), S1 (after 1), S2 (after 10), S3 (after 101), but output Z=1 at S3 regardless of input.
A state diagram with five states: S0 (initial), S1 (after 1), S2 (after 10), S3 (after 101), S4 (after 1010), but output Z=1 at every state.
Which of the following sequences does a synchronous counter using T flip-flops count through? 6, 5, 1, 3, 0, 2.
6, 5, 1, 3, 0, 2
0, 1, 2, 3, 4, 5
1, 2, 3, 4, 5, 6
2, 3, 4, 5, 6, 0
Which of the following correctly describes the outputs f1, f2, and f3 for a 2-bit comparator, where f1 is true when X < Y, f2 is true when X = Y, and f3 is true when X > Y?
f1 = X < Y, f2 = X = Y, f3 = X > Y
f1 = X > Y, f2 = X < Y, f3 = X = Y
f1 = X = Y, f2 = X > Y, f3 = X < Y
f1 = X > Y, f2 = X = Y, f3 = X < Y
Which of the following represents the correct truth table for an 8 to 3 line priority encoder?
The output is the binary representation of the highest-priority active input.
The output is the binary representation of the lowest-priority active input.
The output is always 000 regardless of input.
The output is the binary sum of all active inputs.
Implement the given switching function using an 8 x 1 Multiplexer. f (w, x, y, z) = Σ (0, 1, 2, 3, 7, 9, 13, 14, 15). Which set of variables should be used as the select lines for the multiplexer?
w, x, y
x, y, z
w, y, z
w, x, z
If f (w, x, y, z) = S0,2,4 (w, x, y, z) and g (w, x, y, z) = S3,4 (w, x, y, z), which of the following is the correct expression for p (w, x, y, z) = f + g?
S0,2,3,4 (w, x, y, z)
S0,2,4,3 (w, x, y, z)
S0,2,4 (w, x, y, z)
S0,3,4 (w, x, y, z)
Realize the threshold function f (w, x, y, z) = Σ (0, 1, 3, 4, 5, 6, 7, 12, 13). Which of the following is a correct set of weights and threshold for this function?
Weights: (1, 1, 1, 1), Threshold: 2
Weights: (2, 1, 1, 1), Threshold: 3
Weights: (1, 2, 2, 1), Threshold: 4
Weights: (1, 1, 2, 2), Threshold: 5
Which sequence does a synchronous counter using T flip-flops follow if it is designed to count: 4, 1, 0, 3, 2?
4, 1, 0, 3, 2
0, 1, 2, 3, 4
2, 3, 4, 0, 1
1, 2, 3, 4, 0
A 3-bit shift register can be converted to act as a twisted ring counter by connecting the inverted output of the last flip-flop to the input of the first flip-flop. Which timing diagram best represents the outputs of each flip-flop in this configuration?
Each flip-flop output shows a single '1' circulating with one '0' among them, repeating every three clock cycles.
All flip-flop outputs remain high at all times.
All flip-flop outputs remain low at all times.
The outputs alternate randomly between high and low with no repeating pattern.
Realize a 2-bit comparator using 4 x 16 decoder and OR gates.
A 2-bit comparator can be implemented by connecting the outputs of a 4 x 16 decoder to OR gates to generate the comparison signals.
A 2-bit comparator can be implemented using only AND gates and a 4 x 16 decoder.
A 2-bit comparator can be realized using a 2 x 4 decoder and OR gates.
A 2-bit comparator can be implemented using a 4 x 16 decoder and XOR gates.
Realization the switching function given by T (w, x, y, z) = Σ (3,6,9) + Σ φ(10;11,12,13,14,15) using relay contacts involves how many springs?
8 springs
10 springs
12 springs
6 springs
Identify the variables of symmetry for the following function along with its a-numbers and realize the contact network for the same involving minimum number of contacts.
The variables of symmetry are x and y; a-numbers are 2 and 3; minimum contacts required are 4.
The variables of symmetry are x and z; a-numbers are 1 and 2; minimum contacts required are 3.
The variables of symmetry are y and z; a-numbers are 2 and 4; minimum contacts required are 5.
The variables of symmetry are x and w; a-numbers are 3 and 4; minimum contacts required are 6.
Given the switching function F (x1, x2, x3, x4) = Σ (0, 2, 3, 4, 6, 7, 14, 15), which of the following is a minimal threshold-logic realization?
T = (4, 1, 1, 1, 1)
T = (3, 1, 1, 1, 1)
T = (5, 1, 1, 1, 1)
T = (2, 1, 1, 1, 1)
Which of the following input sequences will cause a synchronous sequential circuit to produce an output Z = 1 and reset to its initial state?
1011
1101
1001
1110
Design an Asynchronous BCD Counter and draw its timing diagrams. Which of the following best describes the function of an Asynchronous BCD Counter?
It counts from 0 to 9 in binary-coded decimal format asynchronously.
It counts from 0 to 15 in binary format synchronously.
It counts from 0 to 7 in binary format asynchronously.
It counts from 0 to 9 in binary format synchronously.
Which sequence does a synchronous modulo-4 counter using T-FFs follow if it is designed to count as 3, 0, 1, 2?
3, 0, 1, 2
0, 1, 2, 3
2, 3, 0, 1
1, 2, 3, 0
Which of the following components are used to design a Full Adder and Full Subtractor using a 3 to 8 Decoder?
3 to 8 Decoder and required gates
Only 3 to 8 Decoder
Only required gates
Multiplexer and required gates
Determine whether the following function is symmetric and if symmetric, identify its a-numbers and variables of Symmetry.
The function is symmetric; a-numbers and variables of symmetry can be identified.
The function is not symmetric; no a-numbers or variables of symmetry exist.
The function is symmetric, but a-numbers and variables of symmetry cannot be identified.
The function is not symmetric, but a-numbers and variables of symmetry can be identified.
Realize the threshold function f(x1, x2, x3, x4) = Σ (0, 1, 3, 4, 5, 6, 7, 12, 13). What is the minimum number of weights required to realize this function?
2
3
4
1
Design a synchronous counter that counts as follows: 6, 5, 1, 3, 0, 2. Use T flip-flops for realization of the counter. What is the minimum number of T flip-flops required for this counter?
2
3
4
5
A 4-bit ring counter using D Flip-flops operates by:
Circulating a single '1' or '0' through the flip-flops in a loop, as shown in the block and timing diagrams.
Counting up in binary from 0000 to 1111 using D Flip-flops.
Generating a Gray code sequence using D Flip-flops.
Storing four independent bits without any feedback.
Select the correct 1-bit comparator logic diagram.
A diagram showing two inputs (A and B) connected to three logic gates: AND, NOR, and XOR, with outputs for A>B, A
A diagram showing two inputs (A and B) connected only to an OR gate, with a single output.
A diagram showing two inputs (A and B) connected to a NOT gate, with outputs for A>B and A
A diagram showing two inputs (A and B) connected to a NAND gate, with outputs for A=B only.
Define hazard.
Hazard is an unwanted switching transient that may occur in digital circuits due to different propagation delays.
Hazard is a type of logic gate used in digital circuits.
Hazard is a method for increasing the speed of a processor.
Hazard is a technique for error correction in memory devices.
What is threshold logic?
Threshold logic is a type of logic circuit where the output is determined by whether the weighted sum of the inputs exceeds a certain threshold value.
Threshold logic is a type of logic circuit that only works with binary inputs and outputs.
Threshold logic is a circuit that always produces a high output regardless of the inputs.
Threshold logic is a type of logic circuit that uses only AND and OR gates.
Define symmetric network.
A symmetric network is a logic network whose output does not change when the inputs are permuted.
A symmetric network is a network where all nodes have the same degree.
A symmetric network is a network that only allows unidirectional data flow.
A symmetric network is a network that requires all inputs to be equal.
Is it possible to use latches in registers? Justify your answer.
Yes, latches can be used in registers because they can store binary information.
No, latches cannot be used in registers because they cannot store data.
Yes, but only flip-flops are used in registers, not latches.
No, registers require only combinational circuits, not latches.
Applications of a shift register include:
Data storage and transfer
Voltage regulation
Frequency modulation
Power amplification
Which of the following best explains the Hamming code with an example?
Hamming code is an error-detecting and error-correcting code that uses parity bits; for example, the code 1011 can be transmitted as 0111001 with parity bits.
Hamming code is a compression algorithm used to reduce file size; for example, it compresses 1011 to 10.
Hamming code is a sorting algorithm for binary numbers; for example, it sorts 1011 as 0111.
Hamming code is a method for encrypting binary data; for example, it encrypts 1011 to 1100.
The theorems and postulates of Boolean algebra include which of the following?
Commutative, Associative, Distributive laws, Identity and Null elements
Pythagoras theorem, Law of Sines, Law of Cosines, Law of Tangents
Newton's laws, Ohm's law, Faraday's law, Ampere's law
Law of Demand, Law of Supply, Law of Diminishing Returns, Law of Equi-Marginal Utility
Simplify the following Boolean function using K-map and realize the simplified expression using only NAND gates. What is the simplified expression for f(x, w, z, y) = Σ m(0,1,5,11) + d(2,7,15)?
f = (x' + w') (z' + y') using NAND gates
f = (x + w) (z + y) using NAND gates
f = (x' + w) (z' + y) using NAND gates
f = (x + w') (z + y') using NAND gates
Simplify the following Boolean function using Tabular method. f(A, B, C, D) = Π M(0,1,5,6,7,9,11,13). What is the simplified expression?
A'B' + B'D' + AC
A'B + B'C' + AD
A'B' + B'C + AD'
A'B + B'D' + AC'
The full subtractor can be implemented using which of the following combinations?
3 to 8 decoder and basic gates
4 to 16 decoder and multiplexers
2 to 4 decoder and flip-flops
3 to 8 decoder and registers
A 4-to-2 priority encoder is designed to output:
2-bit binary code representing the highest-priority active input
4-bit binary code representing all active inputs
2-bit binary code representing the lowest-priority active input
Single output indicating if any input is active
The elementary properties of threshold logic include which of the following?
Ability to implement certain logic functions not possible with conventional gates
Unlimited fan-in and fan-out
No limitations in circuit complexity
Always superior to Boolean logic
The synthesis of a symmetric network can be explained with which of the following examples?
Ladder network
Bridge network
Star network
Ring network
A serial binary adder operates by:
Adding binary numbers one bit at a time using a single full adder and a carry flip-flop.
Adding all bits of binary numbers simultaneously using multiple adders.
Multiplying binary numbers serially.
Subtracting binary numbers in parallel.
A 3-bit asynchronous binary down counter can be designed using:
Three JK flip-flops connected in series with the clock input of each flip-flop driven by the output of the previous flip-flop.
Three D flip-flops connected in parallel with a common clock signal.
Three T flip-flops connected in parallel with a common clock signal.
Three SR flip-flops connected in series with the clock input of each flip-flop driven by the output of the previous flip-flop.
Design a two-bit comparator circuit using AND/OR gates. Assume inputs are available in both complemented and uncomplemented form. Which of the following expressions correctly represents the output when both two-bit numbers are equal?
A1A2B1B2 + A1'A2'B1'B2'
A1B1 + A2B2
A1A2 + B1B2
A1B2 + A2B1
A' S0,1,4 (B, C, D, E) + A S0,3,4 (B, C, D, E) as symmetric function. What is the result?
S0,1,3,4 (B, C, D, E)
S0,2,4 (B, C, D, E)
S0,1,4 (B, C, D, E)
S0,3,4 (B, C, D, E)
Test whether the function f(a, b, c) = Σ (3, 5, 6, 7) is unate.
Yes, the function is unate.
No, the function is not unate.
The function is unate only in variable a.
The function is unate only in variable b.
Realize the threshold function given by f(x1, x2, x3, x4) = Σ (0, 2, 4, 6, 7, 12, 14, 15). What is the minimum number of inputs required for a single threshold gate to realize this function?
4
3
2
1
Realize the symmetric function S1(x1, x2) using relay minimum contacts.
By connecting both x1 and x2 in parallel to the relay contacts.
By connecting both x1 and x2 in series to the relay contacts.
By using a NOT gate with relay contacts.
By using an AND gate with relay contacts.
Which of the following best describes the state diagram of a synchronous sequential circuit that produces an output Z = 1 whenever any of the specified input sequences occur?
A diagram showing states and transitions based on input sequences, with Z = 1 for specified sequences.
A diagram with only one state and no transitions.
A diagram with random transitions not related to input sequences.
A diagram showing states but no output information.
Which sequence does a synchronous counter using T flip-flops count through if designed to follow the order: 6, 5, 1, 3, 0, 2?
6, 5, 1, 3, 0, 2
0, 1, 2, 3, 4, 5
2, 3, 5, 6, 1, 0
1, 2, 3, 4, 5, 6
