WorksheetsElectronics for MSc Physics
Total questions: 30
Worksheet time: 30mins
An ideal op-amp has
Infinite gain, zero bandwidth
Finite gain, infinite bandwidth
Infinite gain, infinite input impedance
Zero output impedance and zero gain
The open-loop gain of IC 741 is typically of the order of
103
104
105
106
In an inverting amplifier, the closed-loop gain depends on
Open-loop gain
Load resistance
Feedback resistors
Input impedance
The differential amplifier amplifies
Sum of inputs
Difference of inputs
Average of inputs
Only one input
The slew rate of an op-amp defines
Maximum output voltage
Maximum frequency
Maximum rate of change of output voltage
Input bias current
An ideal integrator output is proportional to
Input voltage
Square of input
Time integral of input
Time derivative of input
A practical integrator includes a resistor in parallel to
Input resistor
Capacitor
Op-amp
Power supply
Differentiator circuits are sensitive to
DC offset
Noise
Low frequency
Power supply
A Schmitt trigger uses
Negative feedback
No feedback
Positive feedback
Current feedback
555 timer in astable mode produces
One-shot pulse
Sinusoidal wave
Square wave
Triangular wave
The frequency of astable multivibrator depends on
Only capacitor
Only resistor
RC network
Supply voltage
An all-pass filter modifies
Amplitude
Phase
Frequency
Gain
A second-order low-pass filter has roll-off
20 dB/decade
40 dB/decade
60 dB/decade
10 dB/decade
Resolution of an n-bit DAC is
n
2n
1/2n
n2
R–2R ladder DAC is preferred because of
High speed
Simple resistor values
Low cost
High noise
Successive approximation ADC uses
Counter
Comparator and DAC
Integrator
Sample-and-hold only
Dual slope ADC is commonly used in
High-speed converters
Digital multimeters
RF circuits
Microprocessors
Binary equivalent of decimal 25 is
11001
10101
11100
10011
Boolean expression (A + AB) simplifies to
AB
A
B
A + B
De Morgan's theorem states
(A . B)' = A' + B'
(A + B)' = A' . B'
Both answers right
None of the answers
Number of minterms for 3 variables is
6
8
12
16
K-map is most efficient up to
2 variables
3 variables
4 variables
6 variables
Don’t care conditions are useful for
Increasing output
Power saving
Simplification
Timing control
XOR gate output is HIGH when inputs are
Same
Different
All zero
All one
A full adder has
Two inputs
Three inputs
Four inputs
One input
Multiplexer is also called
Data selector
Encoder
Decoder
Comparator
Registers are built using
Gates
Adders
Flip-flops
Counters
Synchronous counters use
Separate clocks
No clock
Common clock
Feedback clock
MS-JK flip-flop helps to avoid
Toggle
High Output
Race Around Condition
Low output
Shift registers are used for
Arithmetic
Data storage and transfer
Logic simplification
Timing
