ASIC DESIGN QUIZ 1

When NMOS gate is connected to +ve

• channel will be formed

• starts to conduct

• starts to burn

• none of the above

Choose the semi custom ASIC

• channeled gate arry

• FPGA

• PLD

• all the above

The VLSI design flow starts with:

• RTL synthesis

• Product specifications

• Library mapping

What is the criterion of full custom design?

• programmed by user

• not required mask design

• all mask design is new without use library

MOS transistor structure is ____________

• a) symmetrical

• b) non symmetrical

• c) semi symmetrical

• d) pseudo symmetrical

Which is used for the interconnection from source and drain in nMOS or pMOS ?

• a) boron

• b) oxygen

• c) aluminium

• d) silicon

In a CARRY LOOK AHAEAD ADDER, carry generate (G)and carry propagate functions (P) can be realized by using

• OR and AND gates respectively

• AND and XOR gates respectively

• NAND and NOR gates respectively

• XOR and XNOR gates respectively

The IC package pins can be directly soldered on the PCB; this method is called

• surface-mounted technology

• surface-mounted technique

• surface-module technology

• surface-mounted technique

In which design all circuitry and all interconnections are designed?

• full custom design
• semi-custom design
• gate array design
• transistor design

The condition for non saturated region is

• Vds = Vgs – Vt
• Vgs lesser than Vt
• Vds lesser than Vgs – Vt
• Vds greater than Vgs – Vt