SLR1: Pipelining in Computing

What is pipelining in the context of computer science?

• A method of data storage

• A technique used to improve the throughput of a CPU

• A type of network protocol

• A method for cooling computer components

Which of the following is a benefit of pipelining in CPUs?

• Increased power consumption

• Reduced instruction execution time

• Increased latency

• Simplified CPU design

In a pipelined processor, what is the primary purpose of the instruction fetch stage?

• To decode the instruction

• To execute the instruction

• To retrieve the instruction from memory

• To write the result back to memory

What is a pipeline hazard?

• A type of software bug

• A situation that prevents the next instruction in the pipeline from executing during its designated clock cycle

• A method of cooling pipelines

• A type of data storage issue

Which of the following is NOT a type of pipeline hazard?

• Data hazard

• Control hazard

• Structural hazard

• Memory hazard

What is a data hazard in pipelining?

• When two instructions require the same hardware resource

• When an instruction depends on the result of a previous instruction

• When the pipeline is stalled due to a branch instruction

• When there is a power failure in the CPU

Which technique can be used to resolve data hazards?

• Instruction reordering

• Branch prediction

• Data forwarding

• Increasing clock speed

What is the role of branch prediction in pipelining?

• To increase the clock speed of the CPU

• To predict the outcome of a branch instruction to avoid pipeline stalls

• To decode instructions faster

• To increase the number of pipeline stages

Which of the following is a disadvantage of pipelining?

• Increased instruction throughput

• Increased complexity in handling hazards

• Reduced power consumption

• Simplified CPU design

What is the main goal of instruction-level parallelism (ILP)?

• To increase the number of instructions executed per second

• To reduce the number of instructions in a program

• To simplify the CPU architecture

• To increase the size of the instruction cache