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WorksheetsFlip Flop
Total questions: 10
Worksheet time: 6mins
In S-R flip-flop, if Q = 0 the output is said to be ___________
a) Set
b) Reset
c) Previous state
The flip-flops which has not any invalid states are _____________
a) S-R, J-K, D
b) S-R, J-K, T
c) J-K, D, T
Sequential circuit contains
a) No memory element
b) Atleast one memory element
c) All inputs applied simultaneously
T Flip flop is used as
Transfer data circuit
Toggle switch
Time delay switch
The advantage of a J-K flip-flop over an S-R FF is that ________.
A.it does not require a clock input
B.it has only one output
C.it has no invalid states
Following flip flop is used to eliminate race around problem
SR Flip flop
JK Flip flop
Master Slave Flip flop
Number of inputs for D flip flop
3
2
1
In a J-K flip-flop, if J=K the resulting flip-flop is referred to as
D flip-flop
T flip-flop
S-K flip-flop
The flip-flop is only activated by _____________
Positive edge trigger
Negative edge trigger
Either positive or Negative edge trigger
The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called
Combinational Circuits
Sequential Circuits
None of the above
