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CPE 110

Total questions: 122

Worksheet time: 2hrs 42mins

Name
Class
Date
1.
What does the CU do?
a)
controls the flow of data within the CPU
b)
It controls the input and output of data so that the signals go to the right place at the right time
c)
It controls and monitors the hardware attached to the system
d)
All of the above
2.
What was Von Neumanns first name?
a)
Terry
b)
Adam
c)
John
d)
Philip
3.
Is cache memory volatile?
a)
True
b)
False
4.
What is this process called:
The CPU makes sense of the instruction it has just fetched.
a)
Decode
b)
Execute
c)
Process
d)
Fetch
5.
It is possible to improve the performance of a computer by choosing a CPU with a higher clock speed
a)
False
b)
True
6.
Select an example of an embedded system
a)
Smartphone
b)
Cruise Control
c)
Laptop
d)
Computer
7.
What does the ALU do?
a)
Logic operations
b)
Nothing
c)
Deletes calculations
d)
Performs calculations
8.
What does MAR stand for?
a)
Main Address Register
b)
Memory Address Register
c)
Massive Address Register
d)
Minimal Age Readable
9.
The stages required for processing are known as the....
a)
Fetch-Execute-decode
b)
Process-decode-fetch
c)
Fetch-Decode-Execute
d)
Process
10.
When the CPU fetches data it makes use of a vital path called?
a)
The Address walk
b)
The Address Bus
c)
The bus
d)
The address plane
11.
A CPU which is able to carry out a thousand million instructions per seconds would have a clock speed of.....
a)
10GHz
b)
1GHz
c)
100MHz
d)
1000GHz
12.
MDR stands for Memory Delete Register
a)
True
b)
False
13.
BottleThroat was the name of a limitation with the Von Neumann architecture?
a)
False
b)
True
14.
What is systems architecture?
a)
 Conceptual model that defines the structure, behaviour, and more views of a system
b)
 Conceptual model that defines the structure of a buildings system
c)
A blueprint of a a building
d)
A system which needs to be replaced and updated
15.

Which of the following are main components of the CPU? Click all that apply.

a)

ROM

b)

Arithmetic Logic Unit (ALU)

c)

Control Unit (CU)

d)

Cache and Registers

e)

RAM

16.

In Von Neumann Architecture, the stored-program concept stores what in what?

a)

Program instructions and Data in Secondary Memory

b)

Data in Memory

c)

The memory address in registers

d)

Program instructions and Data in Primary memory

17.

What is a Register?

a)

A small amount of high-speed read only memory contained within the processor

b)

A small amount of high-speed random access memory contained within the processor

18.

Sort the following memory types by speed (Slowest to Fastest):

RAM 2. HDD 3. SSD 4. Registers 5. Cache 6. CPU

a)

1, 3, 5, 6, 2, 4

b)

2, 3, 1, 4, 5, 6

c)

2, 3, 1, 5, 4, 6

d)

3, 2, 1, 4, 5, 6

19.

Which component of the CPU holds the address of the next instruction to be fetched from memory?

a)

Program counter (PC)

b)

Memory address register (MAR)

c)

Accumulator (ACC)

d)

Memory Data Register (MDR)

e)

Arithmetic Logic Unit (ALU)

20.

Which component of the CPU performs calculations and logical expressions?

a)

Program counter (PC)

b)

Memory address register (MAR)

c)

Accumulator (ACC)

d)

Memory Data Register (MDR)

e)

Arithmetic Logic Unit (ALU)

21.

Which component of the CPU holds the result of an instruction before it is transferred to memory?

a)

Program counter (PC)

b)

Memory address register (MAR)

c)

Accumulator (ACC)

d)

Memory Data Register (MDR)

e)

Arithmetic Logic Unit (ALU)

22.

Which component of the CPU holds data to be written to/retrieved from memory?

a)

Program counter (PC)

b)

Memory address register (MAR)

c)

Accumulator (ACC)

d)

Memory Data Register (MDR)

e)

Arithmetic Logic Unit (ALU)

23.

Which component of the CPU holds the address of the next instruction to be retrieved from memory then executed?

a)

Program counter (PC)

b)

Memory address register (MAR)

c)

Accumulator (ACC)

d)

Memory Data Register (MDR)

e)

Arithmetic Logic Unit (ALU)

24.

What does Fetch Decode Execute cycle do?

a)

Fetches instructions/data from main memory, Decodes instructions, Executes instructions.

b)

Fetches RAM, Decode programmes, Executes the CPU

c)

Fetches Instructions, Decodes Instructions, Executes Data.

25.

What 3 factors can affect the speed of the CPU? Select all that apply.

a)

Number of Cores

b)

Amount of RAM

c)

Amount of Cache

d)

Clock Speed

e)

Use of SSD over HDD

26.

What are embedded systems?

a)

A system that is volatile

b)

A system with many processors

c)

A small computer that forms part of a larger system

d)

A computer designed for multiple uses

27.

According to the von Neumann model, _______ are stored in memory.

a)

only data

b)

only programs

c)

data & programs

d)

neither data nor programs

28.

Which of these are REGISTERS in the CPU? (Tick ALL that are correct)

a)

Accumulator

b)

ALU

c)

Program Counter

d)

Memory Address Register

e)

Control Bus Register

29.

Which of these are REGISTERS in the CPU? (Tick ALL that are correct)

a)

Accumulator

b)

ALU

c)

Program Counter

d)

Memory Address Register

e)

Control Bus Register

30.
What does MAR stand for?
a)
Main Address Register
b)
Memory Address Register
c)
Massive Address Register
d)
Minimal Age Readable
31.

Tick all options that happen in the FETCH CYCLE?

a)

PC is incremented

b)

The Instruction at the MAR address is read from RAM

c)

The PC value is copied to the MAR

d)

The instruction in the MAR is decoded

e)

The value in the MDR is written to the address in the MAR.

32.

Tick all options that happen in the DECODE CYCLE?

a)

PC is incremented

b)

The Instruction at the MAR address is read from RAM

c)

The PC value is copied to the MAR

d)

The instruction in the MAR is decoded by the CU

e)

The value in the MDR is written to the address in the MAR.

33.

Tick all options that happen in the EXECUTE CYCLE?

a)

PC is incremented

b)

The data at the MAR address is read from RAM

c)

The ALU performs any calculations required on the ACC

d)

The instruction in the MAR is decoded by the CU

e)

The value in the MDR is written to the address in the MAR.

34.
The idea developed in 1945 by Von Neumann of a computer holding both programs and the data used by the programs in memory is called the..?
a)
Stored Program Concept
b)
Memory Program System
c)
Stored Memory Concept
d)
Stored Memory Program
35.
The small high speed storage areas within the memory and processor are known as..?
a)
Registers
b)
Addresses
c)
Cache
d)
Buses
36.

The Program Counter

a)

Stores the address of the next instruction in memory

b)

Stores the address of where the next item will be fetched from

c)

Stores data fetched from memory, or waiting to be stored in memory

d)

Stores the result of arithmetic calculations

37.

Accumulator

a)

Stores the address of the next instruction in memory

b)

Stores the address of where the next item will be fetched from

c)

Stores data fetched from memory, or waiting to be stored in memory

d)

Stores the result of arithmetic calculations

38.

The Control Unit

a)

Controls the flow of data around the CPU and also decodes instructions

b)

Only controls the flow of data around the CPU

c)

Only decodes instructions

d)

Controls how much power is directed to all components within the computer

39.

The Arithmetic Logic Unit (ALU)

a)

Carries out numerical calculations and logical decisions

b)

Calculates the different items of number data stored within the Accumulator and converts them into logical decisions

c)

Calculates graphic data as they are only found within GPU units.

d)

Calculates the flow of execution in a program and decodes instructions into small steps to be carried out by the program counter.

40.
What is the purpose of Cache?
a)
Performs Arithmetic and Logical operations
b)
Decodes and directs instructions to be carried out
c)
Stores frequently used data and instructions
d)
Processes graphical functions
41.
Who developed the idea of a stored program computer and modern computer architecture?
a)
John Von Neumann
b)
Bill Gates
c)
Steve Jobs
d)
Tim Berners-Lee
42.
What connects the processor and memory?
a)
Buses
b)
Cache
c)
NIC
d)
Control Unit
43.
What are the 3 parts of the Von Neumann computer architecture?
a)
Processor (CU & ALU), Memory Unit & Input/Output
b)
Processor, RAM & ROM
c)
Processor, RAM & Hard Disk
d)
Memory (CU & ALU), Hard Disk & Input/Output
44.
Which of these buses is bi-directional?
a)
Data Bus
b)
Control Bus
c)
Address Bus
d)
Cache Bus
45.
What is the CPU’s purpose?
a)
To carry out program instructions
b)
To store data
c)
To compile program code
d)
To output data to the user
46.
Von Neumann architecture is relatively uncommon in today’s computers
a)
True
b)
False
47.
Computer architecture isn’t an actual computer, just a design
a)
True
b)
False
48.
Von Newmann architecture is also known as a ‘stored program computer’
a)
True
b)
False
49.
The Control Unit is responsible for handling the movement of instructions and data around the computer
a)
True
b)
False
50.

1101 to decimal

a)

15

b)

11

c)

12

d)

13

51.

1111 to decimal

a)

15

b)

11

c)

12

d)

13

52.

11101 to decimal

a)

23

b)

27

c)

29

d)

30

53.

16 to binary

a)

10000

b)

1111

c)

1000

d)

111

54.

28 to binary

a)

11100

b)

11001

c)

10011

d)

00111

55.

64 to binary

a)

1000 0000

b)

0100 0000

c)

0010 0000

d)

0001 0000

56.

128 to binary

a)

1000 0000

b)

0100 0000

c)

0010 0000

d)

0001 0000

57.
Convert 11001100 to decimal
a)
224
b)
134
c)
104
d)
204
58.
Convert 00100100 to decimal
a)
26
b)
36
c)
46
d)
56
59.

Which of these are hexadecimal digits?

a)

F

b)

G

c)

6

d)

0

e)

H

60.

How many different values can be represented using 8 bits?

a)

128

b)

255

c)

256

d)

999

61.

What is the largest integer that can be represented using 7 bits?

a)

127

b)

128

c)

125

d)

999

62.

What is the binary equivalent of the hexadecimal digit E?

a)

1110

b)

1111

c)

0110

d)

0111

63.

Hexadecimal is used because...

a)

It takes up less space

b)

It is easier for computers to process

c)

It is easier for people to read

d)

It is quicker to write data in

64.

What is the decimal equivalent of the binary number 00100111?

a)

39

b)

57

c)

228

d)

7

65.

What is the decimal equivalent of the hexadecimal number 4B?

a)

75

b)

180

c)

31

d)

255

66.

What is the output Y of this logic cricuit if A = 1, B = 1, and C = 1

a)

0

b)

1

67.

What will the AND gate's output be?

a)

0

b)

1

68.

What will the OR gate's output be?

a)

0

b)

1

69.
When subtracting B from A computers add the inverse of B to A. This process is called?
a)
Binary two
b)
two's enough
c)
two's compliment
d)
two's too many
70.

(a)   is a self-taught English mathematician in the 1800s from which Boolean Algebra later got its name.

71.

What are the three boolean operations in Boolean Algebra?

a)

NOT, AND and XOR

b)

NOT, AND and OR

c)

ADDITION, SUBTRACTION AND MULTIPLICATION

d)

X, Y AND Z

72.

In an XOR Gate if the input A is true and the input B is false the output will be _____.

a)

True

b)

False

73.

Which logic gate represented by this symbol?

a)

OR

b)

XNOR

c)

XOR

d)

NAND

74.

Which logic gate is represented by this truth table?

a)
b)
c)
d)
75.

Which logic gate is represented by this truth table?

a)
b)
c)
d)
76.

Which logic gate is represented by this truth table?

a)
b)
c)
d)
77.
A AND B = Q, If A=1 and B=1 what does Q equal?
a)
1
b)
0
78.
(C AND D) OR (NOT(A OR B)) = Q, If A=1, B=1, C=0 and D=1, what does Q equal?
a)
0
b)
1
79.

To increase the speed of memory access in pipelining, we make use of _______

a)

Special memory locations

b)

Special purpose registers

c)

Cache

d)

Buffers

80.

What does the hardwired control generator consist of?

a)

Decoder/encoder

b)

Condition codes

c)

Control step counter

d)

All of the mentioned

81.

CPU can directly understand this language(PNB Clerk 2011)

a)

C

b)

Assembly language

c)

Machine language

d)

JAVA

82.

Which one of the following is the smallest memory ?

a)

Main Memory

b)

Cache

c)

Registers

d)

External Memory

83.

This Type of access method is known as...

a)

Direct Access

b)

Random Access

c)

Sequential Access

d)

Associative

84.

Which among the following is not of the bus types?

a)

Address Lines

b)

Data Lines

c)

Memory Lines

d)

Control Lines

85.

Multiple interrupts are possible during the program execution.

a)

True

b)

False

86.

Can I/O Modules directly access the memory without involving the processor?

a)

Yes

b)

No

87.

A high priority interrupt will wait for a low priority interrupt to finish.

a)

True

b)

False

88.

Segment Register is a _____register

a)

General Purpose

b)

Address Reg

c)

Data Reg

89.

Program Counter (PC) stores

a)

Address

b)

Data

c)

Instruction

90.

Instruction Reg (IR) stores

a)

Address

b)

Instruction

c)

Data

91.

Register and ALU communicates through

a)

Address Bus

b)

Data Bus

c)

Internal CPU bus

92.

The data read from memory is stored in to

a)

MAR

b)

IR

c)

MDR

93.

After fetch cycle the CPU will execute which cycle?

a)

Interrupt Cycle

b)

Execute Cycle

c)

Execute or Indirect Cycle

94.

After indirect cycle the cpu will perform

a)

Fetch cycle

b)

Interupt Cycle

c)

Execute Cycle

95.

The direction of data flow in fetch cycle is

a)

towards CPU

b)

Towards Memory

c)

Both Direction

96.

The direction of data flow in data bus at interrupt cycle

a)

towards cpu

b)

towards memry

c)

both direction

97.

In fetch cycle MAR gets address from

a)

PC

b)

Control Umit

c)

MDR

98.

In interrupt cycle MAR get address from

a)

PC

b)

IR

c)

Control Unit

99.

In indirect cycle MAR gets address from

a)

PC

b)

Control Unit

c)

MDR

100.

What architecture means for computers

a)

how the computer looks

b)

how computer runs or work

101.

we need to tell the computers what to do with the data and provide instructions

a)

True

b)

False

102.

The fastest memory in the computer system is _____________

a)

ROM

b)

RAM

c)

Cache

d)

None of these

103.

_______________ is a large multilayered printed circuit board inside a computer that contains CPU,BIOS,ROM chip and the CMOS setup information.

a)

Motherboard

b)

RAM

c)

ROM

d)

Cache

104.

1. To achieve high speed, an algorithm must be implemented in hardware.

a)

True

b)

False

105.

2. Magnetic disk is a circular platter constructed of nonmagnetic material, called the substrate, coated with a magnetizable material.

a)

True

b)

False

106.

3. Data are read and written in contiguous blocks called ________________.

a)

logical records

b)

virtual records

c)

physical records

d)

memory records

107.

4. CD-RW provide a permanent record of large volume of user data.

a)

True

b)

False

108.

7. Transfer time in disk performance parameters is time that positioning the head of disk then read and write operation will have performed as the sector moves under the head.

a)

True

b)

False

109.

12. A solid-state drive (SSD) is electromechanical magnetic disks which have a better speed than hard disk drives (HDDs).

a)

True

b)

False

110.

Microprocessor 8085 is the enhanced version of ......... with essentially the same construction set

a)

4800

b)

6800

c)

8080

d)

8088

111.

The stack pointer in the microprocessor is a ______

a)

16 bit register that points to stack memory locations

b)

32 bit accumulator

c)

memory location in the stack

d)

flag regsiter used for the stack

112.

Computer Architecture deals with Hardware and Software

a)

True

b)

False

113.

This cycle is called

a)

Execution Cycle

b)

The Fetch-Execute cycle

c)

Fetch Cycle

114.

The first stage in The Fetch-Execute cycle is Fetch Instructions

a)

True

b)

False

115.

The Fetch-Execute cycle mean how the instructions are executed and process data

a)

True

b)

False

116.

The ALU performs arithmetic and logical operations on all required data. It carries out instructions and also performs the operations on various registers. If it is necessary to get more data for a specific instruction, then they are transferred from the main memory to the registers.

a)

Executing of instructions

b)

Decoding of instructions

c)

Storing of results

d)

Fetching of instructions

117.

The results of executing instructions are placed in the main memory.

a)

Executing of instructions

b)

Decoding of instructions

c)

Storing of results

d)

Fetching of instructions

118.

The instructions are transferred from the main memory and stored temporarily in small memories within the CPU called registers.

a)

Executing of instructions

b)

Decoding of instructions

c)

Storing of results

d)

Fetching of instructions

119.

The control unit interprets the instruction stored in the instruction register, turning it into a signal that can be understood by the ALU.

a)

Executing of instructions

b)

Decoding of instructions

c)

Storing of results

d)

Fetching of instructions

120.

The Second stage in The Fetch-Execute cycle is --------------

a)

Fetch Instructions

b)

Restore results

c)

Execution Cycle

d)

Decode Instructions

121.

The Third stage in The Fetch-Execute cycle is --------------

a)

Fetch Instructions

b)

Restore results

c)

Execution Cycle

d)

Decode Instructions

122.

The Last stage in The Fetch-Execute cycle is Restore results

a)

True

b)

False

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